Highly Linear and Symmetric Analog Neuromorphic Synapse Based on Metal Oxide Semiconductor Transistors with Self‐Assembled Monolayer for High‐Precision Neural Network Computation

Abstract

during data transfer between processor and memory. [6] To overcome this limitation, various research activities on computing in-memory have been conducted to optimize neural network computations. [7] Especially, numerous non-volatile memory devices have been proposed to update synaptic weights and perform matrix-vector multiplications (MVM). [8] However, most previous artificial synapse devices cannot satisfy all the requirements for high-performance neural network operations, for example, a large number of weight levels, wide conductance range, linear/symmetric weight update, outstanding device-to-device uniformity, low operating power, long retention, and good endurance. Resistive random access memory (RRAM) and phase change memory (PCM) exhibit a wide range of conductance changes, but show nonlinear weight modulation and poor device-todevice uniformity due to the abrupt transitions during device operation. [9][10][11] Spin-transfer torque magnetic random access memory shows extremely low programming delay and power consumption, but its conductance range is limited. [12] Flash memory and ferroelectric field-effect transistor (FeFET) exhibit outstanding CMOS compatibility and a wide conductance range; however, flash memory requires high operation voltage, and FeFET has poor fatigue characteristics, which results in cycle-tocycle variation. [13][14][15] To overcome the limitations of non-volatilememory-based synapse devices, metal-oxide-semiconductor This work presents an analog neuromorphic synapse device consisting of two oxide semiconductor transistors for high-precision neural networks. One of the two transistors controls the synaptic weight by charging or discharging the storage node, which leads to a conductance change in the other transistor. The programmed weight maintains for more than 300 s as electrons in the storage node are well preserved due to the extremely low off current of the oxide transistor. Ideal synaptic behaviors are achieved by utilizing superior properties of oxide transistors such as a high on/off ratio, low off current, and large-area uniformity. To further improve the synaptic performance, self-assembled monolayer treatment is applied for reducing the transistor conductance. The reduction of on current reduces the power consumption, and the reduced off current improves the retention characteristics. There is no noticeable decrease in simulated neural network accuracy even when the measured device-to-device variation is intentionally increased by 200%, indicating the possibility of large-array operation with the synapse device.

Thermally Driven Multilevel Non-Volatile Memory with Monolayer MoS2 for Brain-Inspired Artificial Learning

“…Notably, the dynamics of potentiation and depression, specifically the dynamic range, linearity, and asymmetry, play a pivotal role in ensuring the precision of learning and recognition simulation. 48 The outstanding linearity in our case could provide a potential opportunity to achieve high classification accuracy in ANN training. We have attained a dynamic range of conductance ratio [G Max /G Min ] equal to ∼20, which may be deemed as the ON/OFF ratio value for accomplishing superior performance in ANN tasks.…”

“…As shown in Figure c, our proposed synaptic transistor shows remarkable linear and symmetrical conductance updates. Notably, the dynamics of potentiation and depression, specifically the dynamic range, linearity, and asymmetry, play a pivotal role in ensuring the precision of learning and recognition simulation . The outstanding linearity in our case could provide a potential opportunity to achieve high classification accuracy in ANN training.…”

Suppression of the redox reaction between the IGZO surface and the reducing agent TMA using fluorine oxidizing agent treatment

“…CMOS (complementary metal-oxide semiconductor) compatibility, wide optical bandgap (>3.0 eV), and low-temperature processes have been driving InGaZnO (IGZO) thin-lm transistors (TFTs) toward future electronic devices. [1][2][3] In particular, the low off-current of IGZO has attracted intensive efforts in both academia and industry for capacitor-less DRAM (dynamic random access memory) technology. [4][5][6][7][8] Undoubtedly, in the regulation of native defects of oxide semiconductors, oxygen vacancies (V O s), have been the most important topic.…”