Impact of Equivalent Oxide Thickness on Threshold Voltage Variation Induced by Work-Function Variation in Multigate Devices

Lee, Young-Taek; Shin, Changhwan

doi:10.1109/ted.2017.2673859

Cited by 33 publications

(13 citation statements)

References 16 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The methodology used in our analysis is an advancement over the approaches previously reported in literature, in that we simultaneously considered all the relevant sources of statistical variability, as well as their dependence on the most critical geometrical parameters. Previous works considered only Si channel material [12,[14][15][16][17][18][19][20], fewer variability sources and/or sensitivity parameters [17,[19][20][21][22][23][24], and devices not as aggressively scaled as in our investigation [12,15,17].…”

Section: Introductionmentioning

confidence: 99%

Threshold Voltage Statistical Variability and Its Sensitivity to Critical Geometrical Parameters in Ultrascaled InGaAs and Silicon FETs

Zagni

Puglisi

Verzellesi

et al. 2017

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

We investigate the statistical variability of the threshold voltage and its sensitivity to critical geometrical parameters in ultrascaled In0.53Ga0.47As and Si MOSFETs by means of 3-D quantum-corrected drift-diffusion simulations. Dual-gate ultrathin-body and FinFET device structures are analyzed for both channel materials. To assess the variability and sensitivity effects also from the scaling perspective, we consider devices belonging to two technological nodes with gate lengths 15 and 10.4 nm, designed according to International Technology Roadmap for Semiconductors (ITRS) specifications. Variability sources included in our analysis are random-dopant fluctuation, work-function fluctuation (WFF), as well as body- and gate-line-edge roughness (LER). Sensitivity to critical geometrical parameters is assessed by varying gate length, channel thickness, and oxide thickness. Results point out the major detrimental effect of WFF and Body-LER for InGaAs FETs, whereas WFF dominates in Si counterparts. Moreover, the sensitivity analysis shows that control over gate length and channel thickness in the InGaAs technology is fundamental in order to keep variability within tolerable values. Scaling of the InGaAs technology highlights the importance of abiding to ITRS projections regarding LER control improvement. Furthermore, a tight channel thickness control is required in ultrascaled devices due to the large sensitivity of the threshold voltage to the channel thickness combined with increased variability

show abstract

Section: Introductionmentioning

confidence: 99%

Threshold Voltage Statistical Variability and Its Sensitivity to Critical Geometrical Parameters in Ultrascaled InGaAs and Silicon FETs

Zagni

Puglisi

Verzellesi

et al. 2017

IEEE Trans. Electron Devices

View full text Add to dashboard Cite

show abstract

“…The contour plots of normalized electrostatic potential in the channel, near the source and near the drain are shown in Figure 6a,b, respectively. The direction of the electric field is perpendicular to the equipotential line, and the electric field flows from a higher electrostatic potential to a lower electrostatic potential [26]. The electric field in the channel near the drain is larger, as seen in the difference in electric field distribution between Figure 6c,d.…”

Section: Resultsmentioning

confidence: 92%

Random Dopant Fluctuation-Induced Variability in n-Type Junctionless Dual-Metal Gate FinFETs

2019

View full text Add to dashboard Cite

We investigate the effect of random dopant fluctuation (RDF)-induced variability in n-type junctionless (JL) dual-metal gate (DMG) fin field-effect transistors (FinFETs) using a 3D computer-aided design simulation. We show that the drain voltage (VDS) has a significant impact on the electrostatic integrity variability caused by RDF and is dependent on the ratio of gate lengths. The RDF-induced variability also increases as the length of control gate near the source decreases. Our simulations suggest that the proportion of the gate metal near the source to the entire gate should be greater than 0.5.

show abstract

“…Since we chose the TiN as a metal electrode, 4.6 eV and 4.4 eV were assumed for work function of metal grain (probabilities are 60% and 40%, respectively) [see Fig. 4(a)] [14]. Fin LER was generated by following the 1-D Gaussian autocorrelation function [15], using the LER parameters from the International Roadmap for Devices and System (IRDS) [16].…”

Section: Simulation Methodsmentioning

confidence: 99%

Variability Study of Ferroelectric Field-Effect Transistors Towards 7nm Technology Node

Choe

2021

IEEE J. Electron Devices Soc.

View full text Add to dashboard Cite

The random variation sources have a significant influence on the performance of ferroelectric field-effect transistor (FeFET). In this work, comparative analysis on the process variation induced variability of FeFET towards a 7 nm technology node has been conducted, including different device structures from bulk to FDSOI and FinFET. The random ferroelectric/dielectric phase variation (PV), the metal work function variation (WFV) and the line-edge roughness (LER) effects are incorporated in TCAD simulations to quantitatively investigate their impacts on the threshold voltage variation. Especially, the Voronoi diagram is employed to realistically model the ferroelectric grain distributions and to accurately simulate the impact of PV on FeFET characteristics.

show abstract

Impact of Equivalent Oxide Thickness on Threshold Voltage Variation Induced by Work-Function Variation in Multigate Devices

Cited by 33 publications

References 16 publications

Threshold Voltage Statistical Variability and Its Sensitivity to Critical Geometrical Parameters in Ultrascaled InGaAs and Silicon FETs

Threshold Voltage Statistical Variability and Its Sensitivity to Critical Geometrical Parameters in Ultrascaled InGaAs and Silicon FETs

Random Dopant Fluctuation-Induced Variability in n-Type Junctionless Dual-Metal Gate FinFETs

Variability Study of Ferroelectric Field-Effect Transistors Towards 7nm Technology Node

Contact Info

Product

Resources

About