A ternary memristor full adder is designed based on the literal operation and module‐3 plus operation. Literal operation and module‐3 plus operation are the important operations in the tri‐valued algebra system. Multiple‐valued logic can increase the amount of information carried by the signals and reduce the number of devices and connections. The combination of multiple‐valued logic and memristor is an exploration of new devices and new structures. The novel ternary memristor full adder owns the advantage of simpler structure without decoding units to convert ternary signals to binary at the terminals, and all the signals operated by the circuit are ternary. Compared with the traditional ternary full adder, the number of devices and the power consumption are greatly reduced. Simulation results of different memristor models verified the correctness and applicability of the circuit design. It provides a new idea for the design method of memristor circuits, especially multiple‐valued memristors.

Nb self‐doped Bi3Ti1‐xNb1+xO9 (x = 0, 0.02, 0.04, 0.06, 0.08, and 0.1) high‐temperature piezoelectric ceramics were fabricated through the conventional solid‐state sintering method. The effects of different Nb self‐doping levels on the microstructure, piezoelectric activities, and electrical conduction behaviors of these Nb self‐doped Bi3Ti1‐xNb1+xO9 ceramics were studied in detail. Large doping level effects on piezoelectric activity and resistivity were confirmed, which might be ascribed to the evolution of the crystal structure and the variations of the oxygen vacancy concentration and the grain anisotropy induced by Nb doping. An optimized piezoelectric coefficient (d33) of 11.6 pC/N was achieved at x = 0.04 with a Curie temperature of 906°C. Additionally, an improved DC resistivity of 6.18 × 105 Ω·cm at 600°C was acquired in this ceramic. Furthermore, the ceramic exhibited excellent thermal stability with the d33 value maintaining 95% of its initial value after being annealed at 850°C for 2 hours. These results showed that Nb self‐doped Bi3Ti1‐xNb1+xO9 ceramics might have great potentials for high‐temperature piezoelectric applications.

We investigate the effect of random dopant fluctuation (RDF)-induced variability in n-type junctionless (JL) dual-metal gate (DMG) fin field-effect transistors (FinFETs) using a 3D computer-aided design simulation. We show that the drain voltage (VDS) has a significant impact on the electrostatic integrity variability caused by RDF and is dependent on the ratio of gate lengths. The RDF-induced variability also increases as the length of control gate near the source decreases. Our simulations suggest that the proportion of the gate metal near the source to the entire gate should be greater than 0.5.

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In this paper, we investigate the impact of random dopant fluctuation (RDF) on the statistical variations in negative capacitance MOSFETs (NCFETs) through a device simulation coupled with the Landau–Khalatnikov (LK) equation. Compact models for feedback mechanisms that are based on the internal gate voltage amplification in NCFETs are proposed. The results show that internal voltage amplification plays a decisive role in performance improvement of device variability. Further, our simulation study demonstrates that owing to the feedback mechanism, the dispersions of the performance parameters in NCFETs exhibit different statistical distribution characteristics compared to their MOSFET counterparts. Our study may provide further insight regarding device and/or circuit designs utilizing NCFETs.