Impact of Forming Gas Annealing on the Performance of Surface-Channel $\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}$ MOSFETs With an ALD $\hbox{Al}_{2}\hbox{O}_{3}$ Gate Dielectric

Journal of Applied Physics

et al. 2013

In this work, we present the results of an investigation into charge trapping in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors (MOS capacitors), which is analysed using the hysteresis exhibited in the capacitance-voltage (C-V) response. The availability of both n and p doped In0.53Ga0.47As epitaxial layers allows the investigation of both hole and electron trapping in the bulk of HfO2 and Al2O3 films formed using atomic layer deposition (ALD). The HfO2/In0.53Ga0.47As and Al2O3/In0.53Ga0.47As MOS capacitors exhibit an almost reversible trapping behaviour, where the density of trapped charge is of a similar level to high-k/In0.53Ga0.47As interface state density, for both electrons and holes in the HfO2 and Al2O3 films. The experimental results demonstrate that the magnitude of the C-V hysteresis increases significantly for samples which have a native oxide layer present between the In0.53Ga0.47As surface and the high-k oxide, suggesting that the charge trapping responsible for the C-V hysteresis is taking place primarily in the interfacial oxide transition layer between the In0.53Ga0.47As and the ALD deposited oxide. Analysis of samples with a range of oxide thickness values also demonstrates that the magnitude of the C-V hysteresis window increases linearly with the increasing oxide thickness, and the corresponding trapped charge density is not a function of the oxide thickness, providing further evidence that the charge trapping is predominantly localised as a line charge and taking place primarily in the interfacial oxide transition layer located between the In0.53Ga0.47As and the high-k oxide. (C) 2013 AIP Publishing LLC

Section: Introductionmentioning

confidence: 99%

An investigation of capacitance-voltage hysteresis in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors

Lin

Gomeniuk

Journal of Applied Physics

et al. 2013

“…1 In the case of MOS capacitors, what appears to be low frequency inversion-like behaviour due to generation and recombination of minority carriers in the depletion region within the area defined by the gate electrode may in fact be directly attributable to this peripheral inversion charge, which can provide a source of minority carriers. By performing simple capacitance-voltage characterization at multiple ac signal frequencies in conjunction with measuring devices of different areas, over both n-type and p-type semiconductor substrates, it is possible to establish conclusively if the low frequency inversion-like behaviour is due to peripheral inversion effects which may have arisen during device fabrication, or if it is due to generation and recombination of minority carriers in the semiconductor within the region defined by the gate electrode.…”

Section: Introductionmentioning

confidence: 99%

Observation of peripheral charge induced low frequency capacitance-voltage behaviour in metal-oxide-semiconductor capacitors on Si and GaAs substrates

O’Connor

Cherkaoui

Journal of Applied Physics

et al. 2012

Self Cite

We report on experimental observations of room temperature low frequency capacitance-voltage (CV) behaviour in metal oxide semiconductor (MOS) capacitors incorporating high dielectric constant (high-k) gate oxides, measured at ac signal frequencies (2 kHz to 1 MHz), where a low frequency response is not typically expected for Si or GaAs MOS devices. An analysis of the inversion regions of the CV characteristics as a function of area and ac signal frequency for both n and p doped Si and GaAs substrates indicates that the source of the low frequency CV response is an inversion of the semiconductor/high-k interface in the peripheral regions outside the area defined by the metal gate electrode, which is caused by charge in the high-k oxide and/or residual charge on the high-k oxide surface. This effect is reported for MOS capacitors incorporating either MgO or GdSiOx as the high-k layers on Si and also for Al2O3 layers on GaAs(111B). In the case of NiSi/MgO/Si structures, a low frequency CV response is observed on the p-type devices, but is absent in the n-type devices, consistent with positive charge (>8 × 1010 cm−2) on the MgO oxide surface. In the case of the TiN/GdSiOx/Si structures, the peripheral inversion effect is observed for n-type devices, in this case confirmed by the absence of such effects on the p-type devices. Finally, for the case of Au/Ni/Al2O3/GaAs(111B) structures, a low-frequency CV response is observed for n-type devices only, indicating that negative charge (>3 × 1012 cm−2) on the surface or in the bulk of the oxide is responsible for the peripheral inversion effect.

“…6 Such a high D it can 24 restrict Fermi level movement across the semiconductor bandgap and in the case of 25 In 0.53 Ga 0.47 As, prevent surface inversion at the semiconductor/oxide interface. To date, only a In recent work we reported on a study of the minority carrier response of both n-type and p-31 type In 0.53 Ga 0.47 As metal-oxide-semiconductor (MOS) devices formed using an optimized 10% 32 ammonium sulfide ((NH 4 ) 2 S) treatment.…”

mentioning

confidence: 99%

Inversion in the In0.53Ga0.47As metal-oxide-semiconductor system: Impact of the In0.53Ga0.47As doping concentration

O’Connor

Cherkaoui

Applied Physics Letters

et al. 2017

Self Cite

In0.53Ga0.47As metal-oxide-semiconductor (MOS) capacitors with an Al2O3 gate oxide and a range of n and p-type In0.53Ga0.47As epitaxial concentrations were examined. Multi-frequency capacitance-voltage and conductance-voltage characterization exhibited minority carrier responses consistent with surface inversion. The measured minimum capacitance at high frequency (1 MHz) was in excellent agreement with the theoretical minimum capacitance calculated assuming an inverted surface. Minority carrier generation lifetimes, sg, extracted from experimentally measured transition frequencies, xm, using physics based a.c. simulations, demonstrated a reduction in sg with increasing epitaxial doping concentration. The frequency scaled conductance, G/x, in strong inversion allowed the estimation of accurate Cox values for these MOS devices