The semiconductor industry continues to produce ever smaller devices that
are ever more complex in shape and contain ever more types of materials. The
ultimate sizes and functionality of these new devices will be affected by
fundamental and engineering limits such as heat dissipation, carrier mobility
and fault tolerance thresholds. At present, it is unclear which are the best
measurement methods needed to evaluate the nanometre-scale features of such
devices and how the fundamental limits will affect the required metrology. Here,
we review state-of-the-art dimensional metrology methods for integrated
circuits, considering the advantages, limitations and potential improvements of
the various approaches. We describe how integrated circuit device design and
industry requirements will affect lithography options and consequently metrology
requirements. We also discuss potentially powerful emerging technologies and
highlight measurement problems that at present have no obvious solution.