Injected charges in partial SOI LDMOSFETs: A new technique for improving the breakdown voltage

A new technique in LDMOS transistors to improve the breakdown voltage and the lattice temperature

“…These conditions make a lot of problems in such devices [4][5][6]. Many researches have been carried out to solve the problems [7][8][9][10]. Implanting interface charges at the interface of the drift region and buried oxide is effective and attractive [8].…”

“…Many researches have been carried out to solve the problems [7][8][9][10]. Implanting interface charges at the interface of the drift region and buried oxide is effective and attractive [8]. Interface charges cause uniform horizontal electric field and high breakdown voltage would be achieved.…”

“…Based on the research of SOI-LDMOS with interface charges at the surface of the buried oxide [8], we introduce P þ zones into the buried oxide of the SOI-LDMOS to increase the breakdown voltage. The goal of the proposed P þ window LDMOS (PW-LDMOS) is to form a depletion region between the P þ windows and n-drift region.…”

Novel silicon-on-insulator lateral power device with step width drift region

“…The Lateral silicon-on-insulator (SOI) device has been widely used in intelligent power applications because of the dielectric isolation can be obtained easily and leakage current is very low [1,2] . In the practical design of the lateral device, the trade-off between the breakdown voltage (BV) and specific on-resistance (R on,sp ) is a major issue [3,4] .…”

Improving breakdown performance for SOI LDMOS with sidewall field plate

“…1. Introduction: Lateral double diffused MOS transistors (LDMOS) on silicon-on-insulator (SOI) have been widely used as smart power devices in consumer and automotive applications [1,2]. In order to improve the performance of the SOI LDMOS, the superjunction (SJ) technology can be applied to get better performance than counterpart [3].…”