Interpolation filter design for hearing-aid audio class-D output stage application

Circuits Syst Signal Process

2016

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Abstract:Abstract-This work deals with power optimization of the audio processing back end for hearing aids -the interpolation filter (IF), the sigma-delta (SD modulator and the Class D power amplifier (PA) as a whole. Specifications are derived and insight into the tradeoffs involved is used to optimize the interpolation filter and the SD modulator on the system level so that the switching frequency of the Class D PA -the main power consumer in the back end -is minimized. A figure-of-merit (FOM) which allows judging the power consumption of the digital part of the back end early in the design process is used to track the hardware and power demands as the tradeoffs of the system level parameters are investigated. The result is the digital part of the back end optimized with respect to power which provides audio performance comparable to state-of-theart. A combination of system level parameters leading to the lowest switching frequency of the Class D power amplifier reported in literature for the SD modulatorbased back end is derived using this approach. Response to Reviewers:This submission is the final version of our manuscript. According to the instructions for authors and the email from the editor the following changes were done: -the order of the refernces was changed to alphabetic order.-footnote with contact information of all authors was added on the first page Thank you. Powered by Editorial Manager® and ProduXion Manager® from Aries Systems CorporationPeter Pracný, Abstract-This work deals with power optimization of the audio processing back end for hearing aids -the interpolation filter (IF), the sigma-delta ( modulator and the Class D power amplifier (PA) as a whole. Specifications are derived and insight into the tradeoffs involved is used to optimize the interpolation filter and the  modulator on the system level so that the switching frequency of the Class D PA -the main power consumer in the back end -is minimized. A figure-of-merit (FOM) which allows judging the power consumption of the digital part of the back end early in the design process is used to track the hardware and power demands as the tradeoffs of the system level parameters are investigated. The result is the digital part of the back end optimized with respect to power which provides audio performance comparable to state-of-the-art. A combination of system level parameters leading to the lowest switching frequency of the Class D power amplifier reported in literature for the  modulator-based back end is derived using this approach.

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“…This is sufficient to reach the hearing threshold of a normal hearing person to make sure the image is not hearable [24] and [10].…”

Section: Optimizationmentioning

confidence: 99%

Section: Optimizationmentioning

confidence: 99%

Section: Optimizationmentioning

confidence: 99%

“…The input signal of the back end is then up-sampled using a multistage IF and passed to the  modulator [15,24,27].…”

Section: Design Specifications and Figure-of-meritmentioning

confidence: 99%

See 2 more Smart Citations

System-Level Power Optimization of Digital Audio Back End for Hearing Aids

Pracný¹,

Circuits Syst Signal Process

2016

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show abstract

“…The sampling frequency at the system input is fs in = 22.05 kHz. The input signal of the back-end is then up-sampled using an interpolation filter [5] and passed to the Σ∆ modulator. The interpolation filter in state-of-the-art designs [1 -3, 5 -7] consists of multiple stages.…”

Section: Design and Figure-of-merit Specificationsmentioning

confidence: 99%

System-level power optimization for a ΣΔ D/A converter for hearing-aid application

Pracný

Proceedings of the 2013 9th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)

2013

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System-Level Optimization of a DAC for Hearing-Aid Audio Class D Output Stage

Pracný

IFIP Advances in Information and Communication Technology

2013

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