Inverse lithography (ILT) mask manufacturability for full-chip device

Kim, Byung-Gook; Suh, Sungsoo; Woo, Sang Gyun; Cho, Han-Ku; Xiao, Gao; Son, Dong Hwan; Irby, Dave; Kim, David; Baik, Ki‐Ho

doi:10.1117/12.833572

Cited by 10 publications

(15 citation statements)

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“…The same result is observed for contact or via layers, where naturally the majority of shapes size is close to the target size of the contact holes. This methodology allows also to show in applications with curved patterns, respectively ILT patterns [5] , the impact of the selected approximation quality on the numbers of shots in the different shot size classes.…”

Section: Methodology Of Shot Countingmentioning

confidence: 99%

“…The analyses provided by this tool represent the general layout characteristics. Fill pattern elements with relatively large shapes lead to a higher portion of big shots, while model-based layout data (OPC, ILT, SMO) lead to a large amount of smaller shots [5] , [9] . The same result is observed for contact or via layers, where naturally the majority of shapes size is close to the target size of the contact holes.…”

Section: Methodology Of Shot Countingmentioning

confidence: 99%

“…It is obvious that particularly the maximum shape of the MSB beamlets or the single beam should be matched appropriately in order to achieve a small shot count number and thus a short write time. VSB tools with maximum shape sizes decreasing for each new tool generation down to 0.8µm [5] or respectively 0.5µm [6] are prepared for model-based layouts (OPC, ILT), however, write time disadvantages appear, if coarse layout parts, such as fill patterns, long lines etc. are processed.…”

Section: Shot Counts Of Test Data Setmentioning

confidence: 99%

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Multi-shaped e-beam technology for mask writing

et al. 2010

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Photomask lithography for the 22nm technology node and beyond requires new approaches in equipment as well as mask design. Multi Shaped Beam technology (MSB) for photomask patterning using a matrix of small beamlets instead of just one shaped beam, is a very effective and evolutionary enhancement of the well established Variable Shaped Beam (VSB) technique. Its technical feasibility has been successfully demonstrated [2] . One advantage of MSB is the productivity gain over VSB with decreasing critical dimensions (CDs) and increasing levels of optical proximity correction (OPC) or for inverse lithography technology (ILT) and source mask optimization (SMO) solutions. This makes MSB an attractive alternative to VSB for photomask lithography at future technology nodes.The present paper describes in detail the working principles and advantages of MSB over VSB for photomask applications. MSB integrates the electron optical column, x/y stage and data path into an operational electron beam lithography system. Multi e-beam mask writer specific requirements concerning the computational lithography and their implementation are outlined here. Data preparation of aggressive OPC layouts, shot count reductions over VSB, data path architecture, write time simulation and several aspects of the exposure process sequence are also discussed. Analysis results of both the MSB processing and the write time of full 32nm and 22nm node critical layer mask layouts are presented as an example.

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Section: Methodology Of Shot Countingmentioning

confidence: 99%

Section: Methodology Of Shot Countingmentioning

confidence: 99%

Section: Shot Counts Of Test Data Setmentioning

confidence: 99%

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Multi-shaped e-beam technology for mask writing

et al. 2010

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“…In prior publications [1,2] , it has been shown that the Inverse Synthesizer (IS™) produces ILT full chip mask of contact layer with comparable mask write time with conventional OPC while maintaining the significant litho gains of ILT mask.To fully integrate ILT masks into production for all layers including line and space layers such as poly layer, a number of areas were investigated to further reduce ILT mask complexity and total e-beam shot count. These areas include flexible controls of SRAF placements with respect to local feature sizes, improved Manhattan algorithm, topology based variable Manhattan segmentation, jog alignment and mask data fracture optimization.…”

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confidence: 98%

mentioning

confidence: 98%

Affordable and process window increasing full chip ILT masks

et al. 2010

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To enable Inverse Lithography Technology (ILT) for production as one of the leading candidates for low-k 1 lithography at 32nm and below, one major task to overcome is mask manufacturability including mask data fracturing, MRC constraints, writing time, and inspection. In prior publications [1,2] , it has been shown that the Inverse Synthesizer (IS™) produces ILT full chip mask of contact layer with comparable mask write time with conventional OPC while maintaining the significant litho gains of ILT mask.To fully integrate ILT masks into production for all layers including line and space layers such as poly layer, a number of areas were investigated to further reduce ILT mask complexity and total e-beam shot count. These areas include flexible controls of SRAF placements with respect to local feature sizes, improved Manhattan algorithm, topology based variable Manhattan segmentation, jog alignment and mask data fracture optimization. The impact of these approaches on e-beam shot count and lithography performance of ILT masks is presented in the paper.

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