In this letter, we report about design, fabrication, and testing of echelle grating (EG) demultiplexers in the O-band (1.31-µm) for silicon-based photonic integrated circuits. In detail, flat band perfectly chirped EGs and two-point stigmatic EGs on the 300-nm thick silicon-on-insulator platform designed for 4 × 800-GHz spaced wavelength-division multiplexing featuring a low average crosstalk (−30 dB), a precise channel spacing, optimized interchannel uniformity (0.7 dB) and insertion losses (3-3.5 dB) are presented. Wafer-level statistical performance analysis shows the EG spectral response to be stable over the wafer in terms of crosstalk, channel spacing, and bandwidth with minimal wavelength dispersion (<0.8 nm), thus highlighting the intrinsic robustness of high-order gratings and chosen fab pathways as well as the full reliability of 3-D vectorial modeling tools. IndexTerms-Complementary metal-oxide-semiconductor (CMOS), echelle gratings (EGs), photonic integrated circuits (PICs), silicon-on-insulator (SOI), and silicon photonics.

In this communication, we report about the design, fabrication, and testing of echelle grating (de-)multiplexers for the 100GBASE-LR4 norm and other passive architectures such as vertical fiber-couplers and slow-wave waveguides in the O-band (1.31-μm) for Silicon-based photonic integrated circuits (Si-PICs). In detail, two-point stigmatic 20 th -order echelle gratings (TPSGs) on the 300-nm-thick SOI platform designed for 4x800-GHz-spaced wavelength division multiplexing featuring extremely low crosstalk (< -30 dB), precise channel spacing and optimized average insertion losses (~ 3 dB) are presented. Distributed Bragg reflectors (DBRs) are used to improve the grating facets reflectivity, while multi-mode interferometers (MMIs) are used in optimized perfectly-chirped echelle gratings (PCGs) for pass-band flattening. Moreover, 200-mm CMOS pilot lines processing tools including VISTEC variable-shape e-beam lithography are employed for the fabrication. In addition, wafer-level statistics of the multiplexers clearly shows the echelle grating to be inherently fabrication-insensitive to processing drifts, resulting in a minimized dispersion of the multiplexer performances over the wafer. In particular, the echelle grating spectral response remains stable over the wafer in terms of crosstalk, channel spacing and bandwidth, with the wavelength dispersion of the filter comb being limited to just 0.8 nm, thus highlighting the intrinsic robustness of design, fab pathways as well as the reliability of modeling tools. As well as that, apodized one-dimensional vertical fiber couplers, optimized multi-mode interferometers (MMIs) and extremely low-losses slow-light waveguides are demonstrated and discussed. The adiabatic apodization of such 1-D gratings is capable to provide band-edge group indices n g as high as 30 with propagation losses equivalent to the indexlike propagation regime.

No abstract

At the EMLC 2009 in Dresden the data preparation package ePLACE was already presented. This package has been used for quite different applications covering mask write, direct write and special applications. In this paper we will disclose results achieved when using the ePLACE package for processing of layout data of immediate interest. During the evaluation phase of the new solution we could benefit from broad experience we collected over many years with the fracture performance of the MGS software, which is one core element of today's ePLACE package. A key interest of this paper is the investigation of the scalability of computing solutions as a cost-effective approach when processing huge data volumes with the new solution. This is reflected against current state-of-the-art data processing tasks being part of both mask write and direct write applications. Furthermore, we evaluated visualization and simulation possibilities of the ePLACE package with respect to its use with latest layouts in various applications. The improved performance of the data preparation package including its adaptation to new e-beam lithography options, as, for instance, the incorporation of the cell projection capability or the newly developed Multi Shaped Beam (MSB) technology, will be also discussed. As an example the matching of the data path with a Vistec SB3055 will be outlined. Processing of Design For E-Beam (DFEB) data (including cell contents) and their conversion to real exposure data is reported. The advantages of the parallel use of standard shaped beam und cell projection technologies are highlighted focussing on latest writing time yields achieved when applying the CP feature

No abstract