Is Backside the New Backdoor in Modern SoCs?: Invited Paper

Vashistha, Nidish; Rahman, Mir Tanjidur; Paradis, Olivia P.; Asadizanjani, Navid

doi:10.1109/itc44170.2019.9000127

Cited by 17 publications

(1 citation statement)

References 33 publications

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“…Reverse engineering of the masked data is difficult as filament geometry changes rely on atomic-scale rearrangements. For example, we expect the data to be robust to state of the art optical attacks [36], [37], which have proven detrimental for many CMOS-based memory technologies [38]. Finally, the correct key (another programming function P −1 ) can modify the filament geometry in the masked state to reveal the data, as shown in Fig.…”

Section: Device Propertiesmentioning

confidence: 99%

Intrinsically Secure Non-Volatile Memory Using ReRAM Devices

et al. 2022

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The paper describes a device-level encryption approach for implementing intrinsically secure non-volatile memory (NVM) using resistive RAM (ReRAM). Data is encoded in the ReRAM filament morphology, making it robust to both electrical and optical probing methods. The encoded resistance states are randomized to maximize the entropy of the ReRAM resistance distribution, thus providing robustness to reverse engineering (RE) attacks. Simulations of data encryption and decryption using experimental data from Ru(BE)/ALD-HfO 2 (MO)/Zr/W(TE) ReRAM devices reveals an uncorrected bit error rate (BER) < 0.02 and a maximum key entropy of ≈ 17.3 bits per device. A compensation procedure is also developed for maintaining BER in the presence of temperature changes.

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Section: Device Propertiesmentioning

confidence: 99%