Issues in NiSi-gated FDSOI device integration

Kedzierski, J.; Boyd, D.; Zhang, Ying; Steen, M.; Jamin, F.; Benedict, J.; Ieong, M.; Haensch, Wilfried

doi:10.1109/iedm.2003.1269317

Cited by 29 publications

(14 citation statements)

References 2 publications

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“…3(a), it is shown that boron and As are driven to the surface and the NiSi-SiO interface as a result of FUSI. Similar As and B pile-up has been reported in FUSI gates [6], [7], [10]. The amount of B at the NiSi-SiO interface in the TiN-capped sample is much reduced with a considerable amount of out-diffusion of B from the NiSi silicide grain boundaries, resulting in enhanced redistribution in the presence of a TiN layer.…”

Section: Resultssupporting

confidence: 60%

“…The use of a TiN capping layer has very little impact on As distribution due to the large atomic size of As atoms during FUSI process while it has significant influence on B redistribution. B dopants diffuse fast along grain boundaries of the growing silicide due to its small size and hence are not affected by the other mobile species (Ni) [10].…”

Section: Methodsmentioning

confidence: 99%

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Work Function Tuning of Fully Silicided NiSi Metal Gates Using a TiN Capping Layer

Sim

Wen

et al. 2004

IEEE Electron Device Lett.

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This paper investigates a new way of tuning the work function of fully silicided (FUSI) NiSi metal gates for dual-gate CMOS using a TiN capping layer on Ni to control the poly-Si dopant distribution during FUSI formation. In addition, by comparing the work function change of NiSi FUSI with and without TiN capping, we provide clear evidence that dopants at the gate electrode and dielectric interface are responsible for the work function change. The TiN capping layer causes no degradation to the underlying gate dielectric in terms of fixed-oxide charge, gate leakage current, and time-dependent dielectric breakdown characteristics.

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Section: Resultssupporting

confidence: 60%

Section: Methodsmentioning

confidence: 99%

Work Function Tuning of Fully Silicided NiSi Metal Gates Using a TiN Capping Layer

Sim

Wen

et al. 2004

IEEE Electron Device Lett.

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“…This indicated that, in the doped metal gate samples, the dopant enrichment at the interface dominates the work function adjustment just as concluded in [11]. The suitable work functions of both NMOS and PMOS in doped Co Ni…”

Section: Work Function Values Of Undoped Co Nimentioning

confidence: 83%

Dual-work-function metal gates by full silicidation of poly-Si with Co-Ni bi-Layers

Liu

Wen

et al. 2005

IEEE Electron Device Lett.

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Dual-work-function metal gates fabricated by full silicidation (FUSI) of Co-Ni bi-layer with doped poly-Si were investigated for the first time, along with single-metal FUSI systems of CoSi 2 and NiSi. Complete conversion of poly-Si into Co-Ni alloy silicided metal gate (FUSI) Co Ni 1 Si 2 was demonstrated. Although a linear relationship between work function and Ni percentage was observed for FUSI of undoped poly-Si systems, the work functions of doped Co Ni 1 Si 2 are almost identical to those of doped NiSi FUSI metal gates. The alloy FUSI metal gates explored in this letter provide a new class of metal gates for CMOS devices that combine the advantages of both NiSi and CoSi 2 , i.e., proper work function tunability of NiSi and high thermal stability of CoSi 2 .Index Terms-CoSi 2 , Co Ni 1 Si 2 , dual work function, full silicidation (FUSI), metal gate, NiSi.

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“…To get a reliable and valid result, the SILVACO software is calibrated by experimental data [11]. Fig.…”

Section: Resultsmentioning

confidence: 99%

Enhanced Critical Electrical Characteristics in a Nanoscale Low-Voltage SOI MOSFET With Dual Tunnel Diode

Anvarifard

Orouji

2015

IEEE Trans. Electron Devices

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This brief presents a nanoscale low-voltage partially depleted silicon-on-insulator (SOI) structure with improved electrical performance. The brain of the proposed structure is a dual tunnel diode (DTD) composed of a heavily doped p-type L-shaped trench. The accumulated holes are effectively released by the tunnel current of DTD, thus reducing the critical kink effect. Compared with a conventional SOI, the proposed structure is considered as an efficient rival in nanoscaleintegrated applications. Index Terms-Dual tunnel diode (DTD), floating body effect (FBE), kink effect, L-shaped trench, partially depleted silicon-on-insulator MOSFET (PD-SOI MOSFET).

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Issues in NiSi-gated FDSOI device integration

Cited by 29 publications

References 2 publications

Work Function Tuning of Fully Silicided NiSi Metal Gates Using a TiN Capping Layer

Work Function Tuning of Fully Silicided NiSi Metal Gates Using a TiN Capping Layer

Dual-work-function metal gates by full silicidation of poly-Si with Co-Ni bi-Layers

Enhanced Critical Electrical Characteristics in a Nanoscale Low-Voltage SOI MOSFET With Dual Tunnel Diode

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