2018 IEEE Asian Solid-State Circuits Conference (A-Sscc) 2018
DOI: 10.1109/asscc.2018.8579345
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Logic Process Compatible 40nm 256K×144 Embedded RRAM with Low Voltage Current Limiter and Ambient Compensation Scheme to Improve the Read Window

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“…This will result in deterministic spatial variations of device characteristics as examples shown in [38]. To compensate for the impact of cell locations, location-aware write schemes such as [39] can adjust the programming pulses based on the cell locations. The results presented in this work should be seen as a starting point, as there is ample room for improvement.…”
Section: Discussion and Summarymentioning
confidence: 99%
“…This will result in deterministic spatial variations of device characteristics as examples shown in [38]. To compensate for the impact of cell locations, location-aware write schemes such as [39] can adjust the programming pulses based on the cell locations. The results presented in this work should be seen as a starting point, as there is ample room for improvement.…”
Section: Discussion and Summarymentioning
confidence: 99%