Long term storage reliability of antifuse field programmable gate arrays

Patil, Nishad; Das, Diganta; Scanff, Estelle; Pecht, Michael

doi:10.1016/j.microrel.2013.06.016

Cited by 11 publications

(7 citation statements)

References 7 publications

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“…It was found that an amorphous silicon antifuse, once programmed, can switch back to the off-state during later operation. This kind of on-off switching behavior, which was called switch-off, has also been observed for the SiO X , SiN X , NO and AlN-based metal-to-metal antifuse [1,4,7,16,[19][20][21]. Switch-off is highly undesirable, as it results in the failure of the antifuse device.…”

Section: Introductionmentioning

confidence: 76%

“…The antifuse is a one-time programmable (OTP) cell, and it consists of two electrodes and a thin dielectric film as the insulating layer sandwiched between them. Typical antifuses include oxide-nitride-oxide (ONO), amorphous silicon (α-Si:H) and gate oxide structures [7][8][9][10]. Antifuses are programmed from a high resistance or off-state to a low resistance or on-state by applying a voltage or current pulse across the electrodes.…”

Section: Introductionmentioning

confidence: 99%

“…A reliable antifuse device requires a very high resistance or low leakage current in the off-state before programming and a permanent low resistance in the on-state after programming. For ONO antifuse, it has a n+ diffusion/oxide-nitride−oxide/polysilicon structure; although the three-layer dielectric structure could reduce its leakage current, it Electronics 2022, 11, 3522 2 of 11 needs to be thinned down to keep the programming voltage below acceptable limits, which leads to high capacitance of the antifuse [7,11].…”

Section: Introductionmentioning

confidence: 99%

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The Effect of the Dielectric Layer with Surface Plasma Treatment on Characteristics of Amorphous Silicon Antifuse

et al. 2022

Electronics

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With the advantages of lower capacitance, faster operation and smaller size, the amorphous silicon antifuse is very promising for high-speed and high-density FPGA. However, the leakage current of the conventional amorphous silicon antifuse in the off-state is high, which decreases its performance and reliability. Although the leakage current of the SiNX or SiOX antifuse is small, the proper thickness of the dielectric layer is not easily controlled by PECVD processes. In addition, the highly undesirable switch-off behavior is common to almost all metal-to-metal antifuse structures. Focusing on the study of amorphous silicon multilayer dielectric structures, a novel antifuse with the structure of Al/α-Si:H,N/α-Si:H/Al was proposed, which was manufactured by nitrogen plasma treatment for an α-Si:H film surface. Through surface plasma treatment, the hydrogen content of the dielectric layer is stable, the film surface is smoother, the leakage current is reduced, the switch-off behavior is eliminated, the programming voltage is more concentrated and the on-state resistance distribution is more compact. The results demonstrated that surface plasma treatment with proper time for the dielectric layer could significantly improve the performance and reliability of the Al/α-Si:H,N/α-Si:H/Al antifuse. Furthermore, the fabrication process of the α-Si:H,N/α-Si:H structure has excellent compatibility, controllability and simplicity.

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Section: Introductionmentioning

confidence: 76%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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The Effect of the Dielectric Layer with Surface Plasma Treatment on Characteristics of Amorphous Silicon Antifuse

et al. 2022

Electronics

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“…Due to their flexibility and high computing capability, Field-Programmable Gate Arrays (FPGAs) are nowadays widely used to implement digital systems. In aerospace applications, antifuse FPGAs have been traditionally preferred due to their high tolerance to radiation [39]. Nevertheless, there is a growing interest in using SRAM-based FPGAs in space embedded systems because of their lower costs, higher performances and in-flight reconfigurability [28], [36], [43].…”

Section: Introductionmentioning

confidence: 99%

Design and analysis of efficient synthesis algorithms for EDAC functions in FPGAs

Colodro-Conde

Toledo-Moreo

2015

IEEE Trans. Aerosp. Electron. Syst.

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Error Detection and Correction (EDAC) functions have been widely used for protecting memories from single event upsets (SEU), which occur in environments with high levels of radiation or in deep submicron manufacturing technologies. This paper presents three novel synthesis algorithms that obtain areaefficient implementations for a given EDAC function, with the ultimate aim of reducing the number of sensitive configuration bits in SRAM-based Field-Programmable Gate Arrays (FPGAs). Having less sensitive bits results in a lower chance of suffering a SEU in the EDAC circuitry, thus improving the overall reliability of the whole system. Besides minimizing area, the proposed algorithms also focus on improving other figures of merit like circuit speed and power consumption. The executed benchmarks show that, when compared to other modern synthesis tools, the proposed algorithms can reduce the number of utilized look-up tables (LUTs) up to a 34.48%. Such large reductions in area usage ultimately result in reliability improvements over 10% for the implemented EDAC cores, measured as MTBF (Mean Time Between Failures). On the other hand, maximum path delays and power consumptions can be reduced up to a 17.72% and 34.37% respectively on the placed and routed designs.Index Terms-field programmable gate arrays (FPGA), synthesis tools, efficient synthesis, error detection and correction (EDAC), single event upsets (SEU)

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“…In order to comprehensively study the storage environmental effect on a NOR gate component, some new components were selected and an accelerated degradation test was utilized to accelerate the storage degradation process. The accelerated test is an important method to study storage reliability of electronic components, which was used for the research about storage reliability of the antifuse FPGA [5] and the refrigerator drawer system [6]. After the accelerated storage degradation test, several mechanical tests were conducted to evaluate the condition of the components.…”

Section: Introductionmentioning

confidence: 99%

Failure analysis of electronic components after long-term storage

Yong

2015

Engineering Failure Analysis

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Long term storage reliability of antifuse field programmable gate arrays

Cited by 11 publications

References 7 publications

The Effect of the Dielectric Layer with Surface Plasma Treatment on Characteristics of Amorphous Silicon Antifuse

The Effect of the Dielectric Layer with Surface Plasma Treatment on Characteristics of Amorphous Silicon Antifuse

Design and analysis of efficient synthesis algorithms for EDAC functions in FPGAs

Failure analysis of electronic components after long-term storage

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