Low-Frequency Noise in Bilayer MoS<sub>2</sub> Transistor

Xie, Xuejun; Sarkar, Deblina; Liu, Wei; Kang, Jiahao; Marinov, O.; Deen, M. Jamal; Banerjee, Kaustav

doi:10.1021/nn4066473

Cited by 103 publications

(104 citation statements)

References 53 publications

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“…This equation yields trap time constant values of~1.5 μs for intrinsic traps at 300 K and~6.5 μs for oxide traps close to p + Si at 475 K. The extracted oxide trap time constant is similar to values reported in previous reports on oxide traps close to the p + Si-SiO 2 interface 40 but smaller than the oxide trap time constant close to the MoS 2 -SiO 2 interface. 41 The pulse width should be larger than these trap time constants to ensure participation of all traps in hysteresis. Another important factor which affects the hysteresis is the sweep rate (S) of transfer characteristics, S = ΔV ts , which was varied from 0.3 to 30 V/s by changing the voltage step size (ΔV) for a given sampling time t s .…”

Section: Resultsmentioning

confidence: 99%

Reversible hysteresis inversion in MoS2 field effect transistors

et al. 2017

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The origin of threshold voltage instability with gate voltage in MoS 2 transistors is poorly understood but critical for device reliability and performance. Reversibility of the temperature dependence of hysteresis and its inversion with temperature in MoS 2 transistors has not been demonstrated. In this work, we delineate two independent mechanisms responsible for thermally assisted hysteresis inversion in gate transfer characteristics of contact resistance-independent multilayer MoS 2 transistors. Variable temperature hysteresis measurements were performed on gated four-terminal van der Pauw and two-terminal devices of MoS 2 on SiO 2 . Additional hysteresis measurements on suspended (~100 nm air gap between MoS 2 and SiO 2 ) transistors and under different ambient conditions (vacuum/nitrogen) were used to further isolate the mechanisms. Clockwise hysteresis at room temperature (300 K) that decreases with increasing temperature is shown to result from intrinsic defects/traps in MoS 2 . At higher temperatures a second, independent mechanism of charge trapping and de-trapping between the oxide and p + Si gate leads to hysteresis collapse at~350 K and anti-clockwise hysteresis (inversion) for temperatures >350 K. The intrinsic-oxide trap model has been corroborated through device simulations. Further, pulsed current-voltage (I-V) measurements were carried out to extract the trap time constants at different temperatures. Non-volatile memory and temperature sensor applications exploiting temperature dependent hysteresis inversion and its reversibility in MoS 2 transistors have also been demonstrated. npj 2D Materials and Applications (2017) 1:34 ; doi:10.1038/s41699-017-0038-y INTRODUCTION Among two-dimensional materials, graphene 1,2 was the first to be isolated and studied with respect to electronic applications. Due to lack of an energy bandgap in graphene, other 2D materials such as layered transition metal dichalcogenides (TMDs) comprising a wide selection of materials with different bandstructures, and therefore different electrical and optical properties, have garnered significant attention.3-5 Molybdenum disulfide (MoS 2 ) has emerged as a prospective candidate for transistor applications. The presence of a direct bandgap (~1.8 eV) in monolayer form and an indirect bandgap (~1.2 eV) in multilayer MoS 2 makes it a promising channel material for field effect transistors (FETs).

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Section: Resultsmentioning

confidence: 99%

Reversible hysteresis inversion in MoS2 field effect transistors

et al. 2017

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“…As there is no dangling bonds in selenium (within WSe2) and carbon atoms so this analysis shows that the electron 'feels' a finite potential barrier to vertical transport due to the interlayer gap between WSe2 and EG. 30 To identify if this effective potential barrier leads to a true transport barrier, we have also performed non-equilibrium Green's function (NEGF) calculation in a Pd/WSe2/EG device (Fig 3a,b and 4b) to get the space (i.e. real space) resolved local density of states (LDOS) which is shown in Fig.…”

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Atomically Thin Heterostructures Based on Single-Layer Tungsten Diselenide and Graphene

et al. 2014

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Heterogeneous engineering of two-dimensional layered materials, including metallic graphene and semiconducting transition metal dichalcogenides, presents an exciting opportunity to produce highly tunable electronic and optoelectronic systems. In order to engineer pristine layers and their interfaces, epitaxial growth of such heterostructures is required. We report the direct growth of crystalline, monolayer tungsten diselenide (WSe2) on epitaxial graphene (EG) grown from silicon carbide. Raman spectroscopy, photoluminescence, and scanning tunneling microscopy confirm high-quality WSe2 monolayers, whereas transmission electron microscopy shows an atomically sharp interface, and low energy electron diffraction confirms near perfect orientation between WSe2 and EG. Vertical transport measurements across the WSe2/EG heterostructure provides evidence that an additional barrier to carrier transport beyond the expected WSe2/EG band offset exists due to the interlayer gap, which is supported by theoretical local density of states (LDOS) calculations using self-consistent density functional theory (DFT) and nonequilibrium Green’s function (NEGF).

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“…Similar behavior for both WSe 2 and MoS 2 FETs imply We chose WSe 2 FETs as the primary experimental platform due to the following reasons: First, WSe 2 is an emerging TMDC FET material with several desirable properties ranging from high carrier mobility due to low effective mass of the carriers, ambipolar conduction and superior chemical stability compared to sulphides [12,13,28,32,33,35,37]. Second, in spite of the progress in standard electrical transport properties [19,[28][29][30][31][32][33][34][35], the origin and magnitude of intrinsic 1 f -noise, a crucial performance limiting factor in electronic device applications, in WSe 2 FETs is not known, and third, given the recent studies of noise in MoS 2 FETs [46][47][48][49][50], similar studies in WSe 2 allows identification of the generic aspects of noise processes in TMDC FETs, which in turn, provides crucial insight to microscopic details of charge distribution and disorder.…”

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Percolative switching in transition metal dichalcogenide field-effect transistors at room temperature

2016

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We have addressed the microscopic transport mechanism at the switching or "on-off" transition in transition metal dichalcogenide (TMDC) field-effect transistors (FET), which has been a controversial topic in TMDC electronics, especially at room temperature. With simultaneous measurement of channel conductivity and its slow time-dependent fluctuation (or noise) in ultra-thin WSe2 and MoS2 FETs on insulating SiO2 substrates, where noise arises from McWhorter-type carrier number fluctuations, we establish that the switching in conventional backgated TMDC FETs is a classical percolation transition in a medium of inhomogeneous carrier density distribution. From the experimentally observed exponents in the scaling of noise magnitude with conductivity, we observe unambiguous signatures of percolation in random resistor network, particularly in WSe2 FETs close to switching, which crosses over to continuum percolation at a higher doping level. We demonstrate a powerful experimental probe to the microscopic nature of near-threshold electrical transport in TMDC FETs, irrespective of the material detail, device geometry or carrier mobility, which can be extended to other classes of 2D material-based devices as well.The expanding family of atomically thin layers of semiconducting TMDC materials for electronic [1][2][3][4][5][6][7], optoelectronic [8][9][10][11][12][13][14], valleytronic [15][16][17][18][19] and even piezoelectronic [20] applications, has defied a generic framework of electron transport because of diverse material quality, channel thickness dependent band structure, dielectric environment, and nature of substrates. A wide variety of physical phenomena ranging from variable range hopping [5], metal-insulator transition [7] to classical percolative charge flow through inhomogeneous medium [21,22] were reported for MoS 2 , the implications of which often lead to a conflicting microscopic scenario. At low carrier density, for example, hopping via single particle states trapped at short-range background potential fluctuations (∼few lattice constants [23]) is incompatible to the observation of classical percolative conduction that requires long-range inhomogeneity in charge distribution, created when linear screening of the underlying charge disorder breaks down [24][25][26][27]. Observations of metal-insulator transition [7,22] [21,24,25,[40][41][42][43][44], but the experimental difficulty lies in accurately determining the fraction p of the conducting region, or "puddles", embedded inside the insulating matrix. Hence despite compelling evidence of long range inhomogeneity in the charge distribution in MoS 2 FETs [21,22], its manifestation in transport remains indirect and confined only to low temperatures. A way to circumvent this difficulty involves measuring the lowfrequency noise, or 1 f -noise, in the channel conductivity σ, which also scales with p with independent characteristic scaling exponents [40,42], and diverges at the percolation threshold (p c ) [41]. A direct relation between the normalized noise...

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Low-Frequency Noise in Bilayer MoS₂ Transistor

Cited by 103 publications

References 53 publications

Reversible hysteresis inversion in MoS2 field effect transistors

Reversible hysteresis inversion in MoS2 field effect transistors

Atomically Thin Heterostructures Based on Single-Layer Tungsten Diselenide and Graphene

Percolative switching in transition metal dichalcogenide field-effect transistors at room temperature

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Low-Frequency Noise in Bilayer MoS2 Transistor

Cited by 103 publications

References 53 publications

Reversible hysteresis inversion in MoS2 field effect transistors

Reversible hysteresis inversion in MoS2 field effect transistors

Atomically Thin Heterostructures Based on Single-Layer Tungsten Diselenide and Graphene

Percolative switching in transition metal dichalcogenide field-effect transistors at room temperature

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Low-Frequency Noise in Bilayer MoS₂ Transistor