P-type doping of MoS2 has proved to be a significant bottleneck in the realization of fundamental devices such as p-n junction diodes and p-type transistors due to its intrinsic n-type behavior. We report a CMOS compatible, controllable and area selective phosphorus plasma immersion ion implantation (PIII) process for p-type doping of MoS2. Physical characterization using SIMS, AFM, XRD and Raman techniques was used to identify process conditions with reduced lattice defects as well as low surface damage and etching, 4X lower than previous plasma based doping reports for MoS2. A wide range of nondegenerate to degenerate p-type doping is demonstrated in MoS2 field effect transistors exhibiting dominant hole transport. Nearly ideal and air stable, lateral homogeneous p-n junction diodes with a gate-tunable rectification ratio as high as 2 × 10(4) are demonstrated using area selective doping. Comparison of XPS data from unimplanted and implanted MoS2 layers shows a shift of 0.67 eV toward lower binding energies for Mo and S peaks indicating p-type doping. First-principles calculations using density functional theory techniques confirm p-type doping due to charge transfer originating from substitutional as well as physisorbed phosphorus in top few layers of MoS2. Pre-existing sulfur vacancies are shown to enhance the doping level significantly.

The search of a p-type metal contact on MoS2 has remained inconclusive, with high work function metals such as Au, Ni, and Pt showing n-type behavior and mixed reports of n as well as p-type behavior for Pd. In this work, we report quantitative Schottky barrier heights for Au and Pd contacts to MoS2 obtained by analysing low temperature transistor characteristics and contact resistance data obtained using the transfer length method. Both Au and Pd exhibit n-type behavior on multilayer as well as monolayer MoS2 transistors with Schottky barrier heights of 0.126 eV and 0.4 eV, and contact resistances of 42 Ω.mm and 18 × 104 Ω.mm respectively. Scanning photocurrent spectroscopy data is in agreement with the resulting energy band alignment in Au-MoS2-Pd devices further reinforcing the observation that the Fermi-level is pinned in the upper half of MoS2 bandgap.

The origin of threshold voltage instability with gate voltage in MoS 2 transistors is poorly understood but critical for device reliability and performance. Reversibility of the temperature dependence of hysteresis and its inversion with temperature in MoS 2 transistors has not been demonstrated. In this work, we delineate two independent mechanisms responsible for thermally assisted hysteresis inversion in gate transfer characteristics of contact resistance-independent multilayer MoS 2 transistors. Variable temperature hysteresis measurements were performed on gated four-terminal van der Pauw and two-terminal devices of MoS 2 on SiO 2 . Additional hysteresis measurements on suspended (~100 nm air gap between MoS 2 and SiO 2 ) transistors and under different ambient conditions (vacuum/nitrogen) were used to further isolate the mechanisms. Clockwise hysteresis at room temperature (300 K) that decreases with increasing temperature is shown to result from intrinsic defects/traps in MoS 2 . At higher temperatures a second, independent mechanism of charge trapping and de-trapping between the oxide and p + Si gate leads to hysteresis collapse at~350 K and anti-clockwise hysteresis (inversion) for temperatures >350 K. The intrinsic-oxide trap model has been corroborated through device simulations. Further, pulsed current-voltage (I-V) measurements were carried out to extract the trap time constants at different temperatures. Non-volatile memory and temperature sensor applications exploiting temperature dependent hysteresis inversion and its reversibility in MoS 2 transistors have also been demonstrated. npj 2D Materials and Applications (2017) 1:34 ; doi:10.1038/s41699-017-0038-y INTRODUCTION Among two-dimensional materials, graphene 1,2 was the first to be isolated and studied with respect to electronic applications. Due to lack of an energy bandgap in graphene, other 2D materials such as layered transition metal dichalcogenides (TMDs) comprising a wide selection of materials with different bandstructures, and therefore different electrical and optical properties, have garnered significant attention.3-5 Molybdenum disulfide (MoS 2 ) has emerged as a prospective candidate for transistor applications. The presence of a direct bandgap (~1.8 eV) in monolayer form and an indirect bandgap (~1.2 eV) in multilayer MoS 2 makes it a promising channel material for field effect transistors (FETs).

We demonstrate a low and constant effective Schottky barrier height (ΦB ∼ 40 meV) irrespective of the metal work function by introducing an ultrathin TiO2 ALD interfacial layer between various metals (Ti, Ni, Au, and Pd) and MoS2. Transmission line method devices with and without the contact TiO2 interfacial layer on the same MoS2 flake demonstrate reduced (24×) contact resistance (RC) in the presence of TiO2. The insertion of TiO2 at the source-drain contact interface results in significant improvement in the on-current and field effect mobility (up to 10×). The reduction in RC and ΦB has been explained through interfacial doping of MoS2 and validated by first-principles calculations, which indicate metallic behavior of the TiO2-MoS2 interface. Consistent with DFT results of interfacial doping, X-ray photoelectron spectroscopy (XPS) data also exhibit a 0.5 eV shift toward higher binding energies for Mo 3d and S 2p peaks in the presence of TiO2, indicating Fermi level movement toward the conduction band (n-type doping). Ultraviolet photoelectron spectroscopy (UPS) further corroborates the interfacial doping model, as MoS2 flakes capped with ultrathin TiO2 exhibit a reduction of 0.3 eV in the effective work function. Finally, a systematic comparison of the impact of selective doping with the TiO2 layer under the source-drain metal relative to that on top of the MoS2 channel shows a larger benefit for transistor performance from the reduction in source-drain contact resistance.

Rhenium disulfide (ReS2) is an attractive candidate for photodetection applications owing to its thickness-independent direct band gap. Despite various photodetection studies using two-dimensional semiconductors, the trade-off between responsivity and response time under varying measurement conditions has not been studied in detail. This report presents a comprehensive study of the architectural, laser power and gate bias dependence of responsivity and speed in supported and suspended ReS2 phototransistors. Photocurrent scans show uniform photogeneration across the entire channel because of enhanced optical absorption and a direct band gap in multilayer ReS2. A high responsivity of 4 A W–1 (at 50 ms response time) and a low response time of 20 μs (at 4 mA W–1 responsivity) make this one of the fastest reported transition-metal dichalcogenide photodetectors. Occupancy of intrinsic (bulk ReS2) and extrinsic (ReS2/SiO2 interface) traps is modulated using gate bias to demonstrate tunability of the response time (responsivity) over 4 orders (15×) of magnitude, highlighting the versatility of these photodetectors. Differences in the trap distributions of suspended and supported channel architectures, and their occupancy under different gate biases enable switching the dominant operating mechanism between either photogating or photoconduction. Further, a new metric that captures intrinsic photodetector performance by including the trade-off between its responsivity and speed, besides normalizing for the applied bias and geometry, is proposed and benchmarked for this work.