Low-power processor architecture exploration for online biomedical signal analysis

Abstract

In this study, the authors explore sequential and parallel processing architectures, utilising a custom ultra-low-power (ULP) processing core, to extend the lifetime of health monitoring systems, where slow biosignal events and highly parallel computations exist. To this end, a single-and a multi-core architecture are proposed and compared. The single-core architecture is composed of one ULP processing core, an instruction memory (IM) and a data memory (DM), while the multi-core architecture consists of several ULP processing cores, individual IMs for each core, a shared DM and an interconnection crossbar between the cores and the DM. These architectures are compared with respect to power/performance trade-offs for different target workloads of online biomedical signal analysis, while exploiting near threshold computing. The results show that with respect to the single-core architecture, the multi-core solution consumes 62% less power for high computation requirements (167 MOps/s), while consuming 46% more power for extremely low computation needs when the power consumption is dominated by leakage. Additionally, the authors show that the proposed ULP processing core, using a simplified instruction set architecture (ISA), achieves energy savings of 54% compared to a reference microcontroller ISA (PIC24).

Nano-engineered architectures for ultra-low power wireless body sensor nodes

“…power transitions, page transfers, core cycle counters, memory accesses, etc.). Power values obtained from post-placeand-route power analysis of various components (see details in Section 4.2.1) are afterwards used to annotate the simulator to compute the system-level power consumption [Dogan12b].…”

A quality-scalable and energy-efficient approach for spectral analysis of heart rate variability

“…In our sliding window implementation we applied a window of 2 minutes of sampled RR-intervals with 50% overlap between the windows. The system was mapped on a simulator configured with typical sensor node parameters [13,14] and the profiling results are depicted in Fig. 1(b).…”

“…In order, to evaluate the energy savings and the distortions obtained by the proposed approximations we have mapped the conventional and modified PSA system (with N=512 FFT) on a single RISC processor simulator configured with typical, available sensor node characteristics [13,14]. In particular, we are simulating a typical single-core sensor node that is accompanied with a 64KB SRAM.…”

“…In particular, we are simulating a typical single-core sensor node that is accompanied with a 64KB SRAM. The available power consumption values of the processor in a low leakage 90nm technology node [14] are also utilized and the conventional and proposed systems are cross compiled for the target architecture. To determine the impact of the proposed modified PSA system and the applied approximations we have evaluated the ratio between the overall low frequencies power (LFP) and the overall high frequencies power (HFP) of the heart rate spectra.…”

Synchronizing Code Execution on Ultra-Low-Power Embedded Multi-Channel Signal Analysis Platforms

“…Parallel computing using multiple cores can alleviate this issue, provided that applications can be parallelized. To this end, in [3] near threshold ultra-low-power (ULP) multi-and single-core architectures are compared in terms of power and performance ability for several multi-channel biosignal processing applications. It has been shown that the multi-core approach achieves better energy efficiency compared to the single-core approach for medium and high workloads [3].…”