Low swing dual threshold voltage domino logic

Abstract

A low swing domino logic technique is proposed to decrease power consumption without sacrificing noise immunity. With the proposed low swing domino logic circuit technique, active power consumption is reduced by up to 9.4% while improving the noise immunity by 2.6% as compared to standard domino logic circuits. It is also shown that by applying a low swing contention reduction technique, the power savings can be further increased by 6.7% while the delay can be improved by 8.6%. A simple and efficient dual threshold voltage (dual-V t ) circuit technique that incorporates low swing signals is also proposed. It is shown that the proposed dual-V t technique reduces the standby leakage current by approximately 235 times while offering enhanced delay characteristics as compared to a standard low threshold voltage implementation.

Managing static leakage energy in microprocessor functional units

“…As described in [1,13,16], domino circuits permit the use of dual threshold voltage techniques to reduce subthreshold leakage current without sacriÝcing active mode circuit performance. The key to achieving this balance is to place low-Î Ø transistors only along the critical evaluation path as shown in Figure 2a, in which the shaded transistors are the slower high-Î Ø devices.…”

“…Many circuits incorporating a sleep mode have been proposed [1,12,13,16]. For the purpose of this paper, the essential behavior of all these circuits is similar.…”

“…The differences are in the complexity and energy overhead of the sleep mode function. For the ensuing discussion, we select a circuit from [16] that is simple and incurs minimal energy overhead.…”

“…In this paper, we present the beneÝts of employing a dual threshold voltage domino logic circuit technique [16] (dual-Î Ø ) to reduce subthreshold leakage current in the integer functional units (FUs) of a general-purpose processor. We focus on domino logic dual-Î Ø circuits because domino logic has both superior speed and area characteristics as compared to static CMOS logic circuits [1,10,13,16].…”

“…We focus on domino logic dual-Î Ø circuits because domino logic has both superior speed and area characteristics as compared to static CMOS logic circuits [1,10,13,16]. We restrict the analysis to the integer FUs because it is these units that are most heavily utilized.…”