Low temperature (≦600°C) unhydrogenated in-situ doped polysilicon thin film transistors: Towards a technology for flat panel displays

Pichon, Laurent; Raoult, F.; Mourgues, K.; Kis-Sion, K.; Mohammed-Brahim, T.; Bonnaud, Olivier

doi:10.1016/s0040-6090(96)09373-x

Cited by 17 publications

(9 citation statements)

References 9 publications

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“…In particular, it was observed that the oxygen plasma acts as an active layer surface cleaning process and reduces the interface state density by passivation of the dangling bonds [18]. Furthermore, the combination of an oxygen plasma plus an RCA-type cleaning can ensure good gate-insulator/active-layer interface quality [4,19]. Therefore, we showed that the latter cleaning process allows one to improve the electrical properties of the TFTs, for example, a decrease in the threshold voltage and the subthreshold slope, and an increase of the field effect mobility [19].…”

Section: Introductionmentioning

confidence: 99%

Thin film transistors fabricated by in situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

Pichon

Mourgues

Raoult

et al. 2001

Semicond. Sci. Technol.

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High-mobility low-temperature ( 600 • C) unhydrogenated in situ doped polysilicon thin film transistors (TFTs) are made. Polysilicon layers are grown by a low pressure chemical vapour deposition (LPCVD) technique and crystallized in a vacuum by thermal annealing. The source and drain regions are in situ doped. The gate insulator is made of an atmospheric pressure chemical vapour deposition (APCVD) silicon dioxide. Hydrogen passivation is not performed on the transistors. One type of transistor is made of two polysilicon layers, the other one is fabricated from a single polysilicon layer. The electrical properties are better for transistors made of a single polysilicon layer: a low threshold voltage (1.2 V), a subthreshold slope S = 0.7 V/dec, a high field effect mobility (≈100 cm 2 V −1 s −1 ) and an on/off-state current ratio higher than 10 7 for a drain voltage V ds = 1 V. At low drain voltage, for both transistors, the off-state current results from a pure thermal emission of trapped carriers. However, at high drain voltage, the electrical behaviour is different: in the case of single polysilicon TFTs, the current obeys the field-assisted (Poole-Frenkel) thermal emission model of trapped carriers while for TFTs made of two polysilicon layers, the higher off-state current results from a field-enhanced thermal emission.

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Section: Introductionmentioning

confidence: 99%

Thin film transistors fabricated by in situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

Pichon

Mourgues

Raoult

et al. 2001

Semicond. Sci. Technol.

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“…Most of the studies were focused on optimizing the deposition and crystallization conditions of poly-Si layers, leading to larger grains. In other words, the crystallinity of poly-Si can be improved by adjusting the deposition pressure, leading to an improvement of the electrical properties of the TFTs [20], [21]. The advantages of SPC are high reproducibility, good roughness control, and uniformity [22]- [24].…”

Section: Poly-si Tft Fabrication Methodsmentioning

confidence: 99%

Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study

Orouji

Kumar

2006

IEEE Trans. Device Mater. Relib.

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This paper critically examines the leakage current reduction techniques for improving the performance of polycrystalline silicon (poly-Si) thin-film transistors (TFTs) used in active matrix liquid crystal displays. This is a first comprehensive study in literature on this topic. The review assesses important proposals to circumvent the leakage current problem in poly-Si TFTs and a short evaluation of strengths and weaknesses specific to each method is presented. Also, a new device structure called the triple-gate poly-Si TFT (TG-TFT) is discussed. The key idea in the operation of this device is to make the dominant conduction mechanism in the channel to be controlled by the accumulation charge density modulation by the gate and not by the gate-induced grain barrier lowering. Using two-dimensional and two-carrier device simulation, it is demonstrated that the TG-TFT exhibits a significantly diminished pseudosubthreshold conduction leading to several orders of magnitude reduction in the OFF-state leakage current when compared with a conventional poly-Si TFT. The reasons for the improved performance are explained.Index Terms-Active liquid crystal displays, leakage current, polycrystalline silicon (poly-Si), thin-film transistor (TFT), traps.

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“…The solidphase crystallization is ensured by thermal annealing in vacuum at 600°C. 3 Source and drain regions are made of a heavily in situ doped polysilicon layer. The gate insulator is made of an atmospheric-pressure chemical-vapor-deposition SiO 2 and densified by thermal annealing at 600°C in a N 2 ambient.…”

mentioning

confidence: 99%

Analysis of the activation energy of the subthreshold current in laser- and solid-phase-crystallized polycrystalline silicon thin-film transistors

Pichon

Mercha

Carin

et al. 2000

Applied Physics Letters

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International audienceAnalysis of the thermal and gate-voltage dependences of the current in the subthreshold region is performed on both low-temperature laser-crystallized and solid-phase-crystallized polycrystallinesilicon (polysilicon) thin-film transistors(TFTs).Temperature measurements are made at first in order to extract the variations of the activation energyEA of the drain current with the gate voltage. The plot of the subthreshold current versus the measuredactivation energy leads to an apparent activation energyEA/n, where the n factor is extracted from the slope of this plot. The n factor is close to 1 for laser-crystallized polysilicon TFTs while it is rather close to 2 for solid-phase-crystallized ones. These two values can be attributed to a different defect distribution in the two differently crystallized TFTs polysilicon active layers

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Low temperature (≦600°C) unhydrogenated in-situ doped polysilicon thin film transistors: Towards a technology for flat panel displays

Cited by 17 publications

References 9 publications

Thin film transistors fabricated by in situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

Thin film transistors fabricated by in situ doped unhydrogenated polysilicon films obtained by solid phase crystallization

Leakage Current Reduction Techniques in Poly-Si TFTs for Active Matrix Liquid Crystal Displays: A Comprehensive Study

Analysis of the activation energy of the subthreshold current in laser- and solid-phase-crystallized polycrystalline silicon thin-film transistors

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