Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Zhang, L.; Li, J.; Zhang, X.W.; Yu, Dong-Bin; Khizar-ul-Haq, H.P. Lin; Jiang, Xue-Yin; Zhang, Z.L.

doi:10.1016/j.cap.2010.03.009

Cited by 17 publications

(6 citation statements)

References 9 publications

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“…We obtained a subthreshold swing, S , defined as the increase in gate voltage per 10-fold increase in source–drain current, in the range of 250–450 mV decade –1 . This value is comparable to the best values reported in CQD FETs and other disordered systems such as organic field-effect transistors. , We used the subthreshold swing, S , and our measured geometric capacitance, C i , to estimate the two-dimensional trap density within the active region of quantum dots at the interface, N t , 2D : N t,2D = ( S × e k B T ⁡ ln ⁡ 10 − 1 ) × C i e …”

Section: Resultssupporting

confidence: 71%

“…It is in this region that we are able to obtain information regarding the in-gap trap states and determine their impact on electronic device properties. 15 The fabrication of the nanodielectric is depicted in Figure 2a. A patterned aluminum gate is electrochemically oxidized, defining what will become the channel length.…”

Section: Resultsmentioning

confidence: 99%

“…Below the threshold potential V t , we observe a sharp exponential increase from an intrinsic nonconductive domain up to the formation of the conductive n-channel. It is in this region that we are able to obtain information regarding the in-gap trap states and determine their impact on electronic device properties …”

Section: Resultsmentioning

confidence: 99%

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Joint Mapping of Mobility and Trap Density in Colloidal Quantum Dot Solids

et al. 2013

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Field-effect transistors have been widely used to study electronic transport and doping in colloidal quantum dot solids to great effect. However, the full power of these devices to elucidate the electronic structure of materials has yet to be harnessed. Here, we deploy nanodielectric field-effect transistors to map the energy landscape within the band gap of a colloidal quantum dot solid. We exploit the self-limiting nature of the potentiostatic anodization growth mode to produce the thinnest usable gate dielectric, subject to our voltage breakdown requirements defined by the Fermi sweep range of interest. Lead sulfide colloidal quantum dots are applied as the active region and are treated with varying solvents and ligands. In an analysis complementary to the mobility trends commonly extracted from field-effect transistor studies, we focus instead on the subthreshold regime and map out the density of trap states in these nanocrystal films. The findings point to the importance of comprehensively mapping the electronic band- and gap-structure within real quantum solids, and they suggest a new focus in investigating quantum dot solids with an aim toward improving optoelectronic device performance.

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Section: Resultssupporting

confidence: 71%

Section: Resultsmentioning

confidence: 99%

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Joint Mapping of Mobility and Trap Density in Colloidal Quantum Dot Solids

et al. 2013

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“…However, at this time, the literature reports only a few works focused on roomtemperature processing of ZnO-based TFTs. 16,19,20 This is because, normally, a high deposition temperature improves the electrical properties of the ZnO channel layer. Furthermore, most of the work related to ZnO as a semiconductor active layer in TFTs has used a reactive environment of argon-oxygen mixture, and the devices have been characterized as a function of the content of each component in the mixture.…”

Section: Introductionmentioning

confidence: 98%

Effect of Sputtered ZnO Layers on Behavior of Thin-Film Transistors Deposited at Room Temperature in a Nonreactive Atmosphere

Medina-Montes

Lee

Perez

et al. 2011

Journal of Elec Materi

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In this work we present the electrical characterization of ZnO-based thin-film transistors fabricated at room temperature. The ZnO films were deposited by radiofrequency magnetron sputtering at variable argon pressure (3 mTorr to 10 mTorr) at room temperature. The sputtered ZnO films were polycrystalline with hexagonal structure and electrical resistivity ranging from 10 1 X cm to 10 8 X cm for films deposited from 3 mTorr to 10 mTorr. The trend in the electrical behavior of the devices was found to be due to the variation of the electron concentration of the ZnO films. The devices with better performance showed a field-effect mobility of 2.9 cm 2 /Vs, threshold voltage of 20 V, I on / I off % 10 6 , and electrical resistivity of $10 8 X cm. In addition, linear behavior of I on /I off with deposition pressure was observed. The lowest I on /I off ratio ($2) was calculated for devices with ZnO layers deposited at 3 mTorr, and the highest ratio ($10 6 ) for devices processed at 10 mTorr. Hall-effect measurements were performed on ZnO films showing the lowest resistivity. The layer grown at 3 mTorr showed a Hall mobility of l H = 8.9 cm 2 /Vs and carrier concentration of n = 4.2 9 10 16 cm À3 with resistivity of q = 31.8 X cm. For films deposited at 5 mTorr, the Hall mobility, carrier concentration, and resistivity were l H = 7.9 cm 2 /Vs, n = 3.4 9 10 16 cm À3 , and q = 38.4 X cm, respectively. Films deposited at 8 mTorr and 10 mTorr could not be measured due to their high resistance.

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“…Compared with hydrogenated amorphous silicon and organic semiconductors, metal-oxide semiconductors have favorable field-effect mobility, high optical transparency, high uniformity in large-scale fabrication, and excellent thermal and environmental stability in the field of thin-film transistor (TFT) circuitry. − Metal oxide semiconductors with excellent quality are usually fabricated through vacuum deposition techniques, which lead to high manufacturing costs and poor large-area compatibility. Therefore, more and more efforts have been devoted to solution-processed metal-oxide semiconductors recently, − with carrier mobilities of 5–6 cm 2 V –1 s –1 for zinc oxide (ZnO), 16 cm 2 V –1 s –1 for indium zinc oxide (IZO), 28–33 cm 2 V –1 s –1 for zinc tin oxide (ZTO), , and 7.6 cm 2 V –1 s –1 for indium gallium zinc oxide (IGZO) …”

Section: Introductionmentioning

confidence: 99%

High-Performance Transistors Based on Zinc Tin Oxides by Single Spin-Coating Process

et al. 2012

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Films of zinc tin oxide (ZTO), grown from solutions with zinc acetate dehydrate and tin(II) 2-ethylhexanoate dissolved in 2-methoxyethanol, have been used to fabricate thin-film transistors in combination with solution-processed aluminum oxide as the gate insulator. And the nonhomogeneity of the single-layer ZTO films, caused by both ZTO film-substrate interaction and surface crystallization, has been studied, which is essential to achieve high performance transistors. In the bottom-contact thin-film transistor based on a Sn-rich layer of ZTO, a high mobility of 78.9 cm(2) V(-1) s(-1) in the saturation region has been obtained, with an on-to-off current ratio of 10(5) and a threshold gate voltage of 1.6 V.

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Low-voltage-drive and high output current ZnO thin-film transistors with sputtering SiO2 as gate insulator

Cited by 17 publications

References 9 publications

Joint Mapping of Mobility and Trap Density in Colloidal Quantum Dot Solids

Joint Mapping of Mobility and Trap Density in Colloidal Quantum Dot Solids

Effect of Sputtered ZnO Layers on Behavior of Thin-Film Transistors Deposited at Room Temperature in a Nonreactive Atmosphere

High-Performance Transistors Based on Zinc Tin Oxides by Single Spin-Coating Process

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