Low-Voltage Pentacene Field-Effect Transistors Fabricated on High-Dielectric-Constant Strontium Titanate Insulator

Abstract

A strontium titanate (SrTiO3) thin film on a heavily doped n-type silicon wafer prepared by sputtering was characterized by various means. The result indicated that the thin film mainly consisted of an 87-nm-thick amorphous SrTiO3 with a Sr:Ti:O ratio of 1:1.3:4.7, a dielectric constant of ε r=12.1, and a leakage current density of 0.2 nA/cm2 at an electric field of 1 MV/cm. Pentacene field-effect transistors fabricated using the SrTiO3 thin film as an insulator, showed well-saturated output characteristics at low driving voltages (V D=-3 V), and a hole mobility of 0.08 cm2 V-1 s-1, an on/off current ratio of 104, and threshold voltage of -0.7 V.

Low-Voltage P3HT Field-Effect Transistors Fabricated Using High-k Gate Insulators

“…The HfSiO 5 -based pentacene FET showed well-saturated output characteristics at low driving voltage of −10 V, and the on/off current ratio is relatively high, i.e., 2.6 × 10 3 [9]. The SrTiO 3 -based pentacene FET also showed well-saturated output characteristics at low driving voltage of −3 V, and the on/off current ratio is as high as 1.4 × 10 4 [12]. The present P3HT-FET fabricated on any substrate, however, showed very low on/off current ratio mainly owing to the high off current.…”

“…As mentioned, we have already studied the pentacene-FETs fabricated using the HfSiO 5 or SrTiO 3 thin films as a high-k gate insulator [9,12]. The HfSiO 5 -based pentacene FET showed well-saturated output characteristics at low driving voltage of −10 V, and the on/off current ratio is relatively high, i.e., 2.6 × 10 3 [9].…”

“…Dielectric constant was 7.7, and the leakage current density was 1 nA/cm 2 at electric field of 2 MV/cm [9]. On the other hand, SrTiO 3 thin film with a thickness of 87 nm was deposited on a heavily doped n-type Si wafer by sputtering of a SrTiO 3 target using Ar:O 2 as carrier gas for 80 min [12]. Dielectric constant was 12.1, and the leakage current density was 0.2 nA/cm 2 at electric field of 1 MV/cm [12].…”

“…SrTiO 3 films wet-processed on the silicon substrates are potentially expected to be used as dielectric gate insulator to low-voltage organic FETs. Recently we have reported that sputtered SrTiO 3 thin films are suitable as a high-k gate insulator for fabrication of low-voltage pentacene FETs [12]. The pentacene FET fabricated on SAM-treated SrTiO 3 thin film showed well-saturated output characteristics at low driving voltages, i.e., V D = −3 and V G = −2.1 V, and hole mobility of 0.08 cm 2 /Vs, on/off current ratio of 10 4 and V T of −0.7 V [12].…”

“…Recently we have reported that sputtered SrTiO 3 thin films are suitable as a high-k gate insulator for fabrication of low-voltage pentacene FETs [12]. The pentacene FET fabricated on SAM-treated SrTiO 3 thin film showed well-saturated output characteristics at low driving voltages, i.e., V D = −3 and V G = −2.1 V, and hole mobility of 0.08 cm 2 /Vs, on/off current ratio of 10 4 and V T of −0.7 V [12]. Pentacene or C 60 FETs fabricated on SAM-free SrTiO 3 thin film also showed well saturated output characteristics at −3 or 3 V, which is reported elsewhere [13].…”