<title>Multilevel Resist For Photolithography Utilizing An Absorbing Dye: Simulation And Experiment</title>

Abstract

Linewidth control using a tri -level resist system on wafers with topology is investigated. An absorbing dye is incorporated in the bottom layer to improve the usable resolution. Resist patterns of 1 um and 0.75 um over underlying geometries are demonstrated using a projection aligner. The advantages of a multilevel system are investigated using an exposure and development simulation program for optical lithography. The relative contributions of planarization and reflection suppression are discussed.

Spin‐On Glass as an Intermediate Layer in a Tri‐Layer Resist Process

“…The lower resist layer and dielectric layer are sequentially applied, spun and baked on a track oven system. The lower resist layer consists of approximately 2~m of positive photoresist containing a dye whose absorbance maximum is matched to the exposure wavelength of the photolithography system employed [3]. The resist must be hardbaked in order to ensure that it will not mix with the SOG during the SOG dispense step.…”