Lumped-Element Wilkinson Power Combiners Using Reactively Compensated Star/Delta Coupled Coils in 28-nm Bulk CMOS

Abstract

This paper presents four compact lumped-element Wilkinson power combiners (WPC) operating at 5 GHz in 28-nm bulk CMOS. To minimize the chip area, the inductances in the designs are implemented using mutually coupled coils. Two designs use star inverting coupled coils (SICC), while the other two employ delta noninverting coupled coils (DNICC). One of the two SICC-based designs (and similarly for the DNICC-based designs) incorporates a second harmonic (2f 0 ) trap to lower the total harmonic distortion and reduce the required inductances by 25%, further reducing the circuits footprint. A design methodology for effectively exploiting the mutual coupling and nullifying the coupling parasitics is presented. The coupling parasitic in the DNICC-based design is exploited to provide the WPC isolation resistance, resulting in a lumped-element WPC requiring only three components: a coupled coil and two capacitors. The measurement and simulation results are presented to confirm the theory validity. The SICC-based WPC with an area of 0.13 mm 2 achieved input return losses (RL) >17.5 dB, output RL > 11.8 dB, isolation >11.2 dB, and insertion losses (IL) <1.5 dB across 3.5-5.4-GHz frequency range. Its variant with a 2f 0 trap achieved, from 3.5-5.35 GHz, input RL >18.2 dB, output RL >11.6 dB, isolation >11 dB, IL <1.4 dB, and peak 2f 0 rejection of 18 dB at 10.2 GHz in an area of 0.13 mm 2 .The DNICC-based WPC with an area of 0.11 mm 2 achieved input RL and isolation >10 dB, output RL >15.3 dB, and IL <1.2 dB across 4.1-5.45-GHz frequency range. Its variant with a 2f 0 trap achieved, from 4.3-5.3 GHz, input RL and isolation >10.1 dB, output RL >14.6, IL <1.2 dB, and peak 2f 0 rejection of 23 dB at 10.4 GHz in an area of 0.09 mm 2 .

A Power-Efficient CMOS Multi-Band Phased-Array Receiver Covering 24–71-GHz Utilizing Harmonic-Selection Technique With 36-dB Inter-Band Blocker Tolerance for 5G NR

“…After the LO phase shifter for beamforming, the LO signal is divided into three paths by a compact 1-to-3 Wilkinson divider, which ensures isolation between each path. The bulky λ/4 wavelength transmission lines in the Wilkinson divider are replaced by areaefficient CLC networks to significantly reduce the effective footprint [28], [29]. After that, a tri-phase phase shifter is employed in each path to realize the corresponding LO phase assignment for each harmonic-selection mode.…”

Compact Wilkinson Power Divider With Common Inductor on the IPD Process

“…Wilkinson power dividers (WPDs) in integrated circuit forms have been widely studied in the microwave and millimeter-wave frequency ranges. Lumped transmission line circuits have been used to replace distributed transmission lines in designing single-frequency, dual-band, wideband and ultra-wideband power dividers [1][2][3][4][5][6][7][8][9][10][11][12]. Lumped transmission line circuits are generally in the form of right-handed (or conventional) transmission lines, but lefthanded and composite right-/left-handed transmission lines have also been found in many applications [13].…”

“…To reduce the circuit size, a minimal number of inductors is preferred. Love et al used a single compensated star/delta coupled coil lumped element WPD in CMOS [12].…”