Mosfet-Only Two-Stage Operational Amplifiers With Miller Compensation: Design and Fabrication in Nano-Scale Cmos

Abstract

Nano-scale area-e±cient MOS devices are employed in this article to stabilize high-speed operational ampli¯ers (opamps) for those applications that deal with negative feedback. As an alternative choice, metal-insulator-metal (MIM) capacitors cannot be integrated in every technology as they require additional process masks. Moreover, these components su®er from large silicon area. In this paper, considerations of a successful MOSFET-only ampli¯er design are highlighted and described. These considerations make it possible to fabricate these ampliers for a nano-scale digital system-on-chip (SoC). Circuit-level simulations include comparison between MOS capacitors (MOSCAPs) with MIM capacitors (MIMCAPs) in two identical processes. The e±ciency of the given design considerations are also validated through simulation in 90-nm CMOS technology. A MOSFET-only ampli¯er is designed as the main part of a 5 MS/s sample-and-hold. Using the proposed design techniques, the MOSFET-only ampli¯er with Miller compensation recovers 51% silicon die with respect to a MIMCAP ampli¯er for identical signal-to-noise-plus-distortion (SNDR) ratio.

Dual loop cascode‐Miller compensation with damping factor control unit for three‐stage amplifiers driving ultralarge load capacitors

“…A solution to this problem is to realize a variable C D capacitor, 33,34 through which the implementation details are out of the scope of this article. A solution to this problem is to realize a variable C D capacitor, 33,34 through which the implementation details are out of the scope of this article.…”

“…The above expression is, of course, for nominal design of the amplifier, since C D depends on the load capacitor and must change according to C L while α is an unchanged value. A solution to this problem is to realize a variable C D capacitor, 33,34 through which the implementation details are out of the scope of this article. The above expressions from ( (14)) to ( (16)) are the main design considerations for DLCDFC compensation network, enabling the designer to approximate the required components before starting the simulation.…”