Multitrack Power Factor Correction Architecture

Chen, Minjie; Chakraborty, Sudipta; Perreault, David J.

doi:10.1109/tpel.2018.2847284

Cited by 22 publications

(3 citation statements)

References 37 publications

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“…the converter does not operate when |V ac | < V out ), it will be unable to theoretically achieve unity power factor. However, as investigated in [5], extremely high power factors are able to be achieved for conduction angles that are large fractions of the line cycle.…”

Section: Introductionmentioning

confidence: 99%

A Combined Power Factor Correcting and Active Voltage Balancing Control Technique for Buck-Type AC/DC Grid-Tied Flying Capacitor Multilevel Converters

Bayliss,

Brooks,

Pilawa-Podgurski

2023

2023 IEEE 24th Workshop on Control and Modeling for Power Electronics (COMPEL)

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Single-stage Power Factor Correction (PFC) ac-dc rectifiers open a pathway to achieve high power density and efficiency in grid-connected rectifier applications where the target dc voltage is lower than the peak ac voltage (e.g. data center power delivery, LED drivers). Typically in data center and similar applications, a two-stage solution employing a step-up ac-dc stage followed by a step-down dc-dc stage is employed to achieve grid to 48 V conversion. This approach suffers from the efficiency penalty of a cascade of power converters and typically lower power density due to the design of two separate power conversion stages. A single-stage, buck-type PFC rectifier where the output dc voltage is lower than the peak ac voltage circumvents these issues. This work analyzes and develops a single-stage bucktype PFC rectifier utilizing a six-level flying capacitor multilevel (FCML) converter with active flying capacitor voltage balancing and current control to achieve high power density rectification in a single-stage solution. This work is the first to achieve active balancing of capacitors combined with PFC operation in a stepdown FCML rectifier.

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Section: Introductionmentioning

confidence: 99%

A Combined Power Factor Correcting and Active Voltage Balancing Control Technique for Buck-Type AC/DC Grid-Tied Flying Capacitor Multilevel Converters

Bayliss,

Brooks,

Pilawa-Podgurski

2023

2023 IEEE 24th Workshop on Control and Modeling for Power Electronics (COMPEL)

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“…The Multitrack PFC architecture leverages the advantages of the Multitrack dc-dc architecture, and address the unique challenges in achieving soft-switching at high frequencies across universal ac line voltage while performing PFC and voltage regulation. This paper is developed from our earlier conference publication [25] and presents extended theoretical analysis and experimental results.…”

Section: Introductionmentioning

confidence: 99%

“…Block diagram of a Multitrack dc-dc architecture[1]. Block diagram of a Multitrack PFC architecture[25].…”

mentioning

confidence: 99%

Multitrack power factor correction architecture

Chen

Chakraborty

Perreault

2018

2018 IEEE Applied Power Electronics Conference and Exposition (APEC)

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Single-phase universal-input ac-dc converters are needed in a wide range of applications. This paper presents a novel power factor correction (PFC) architecture that can achieve high power density and high efficiency for grid-interface power electronics. The proposed Multitrack PFC architecture is a new development of the Multitrack concept. It reduces the internal device voltage stress of the power converter subsystems, allowing PFC circuits to maintain zero-voltage-switching (ZVS) at high frequency (1 MHz-4 MHz) across universal input voltage range (85 VAC-265 VAC). The high performance of the power converter is enabled by delivering power in multiple stacked voltage domains and reconfiguring the power processing paths depending on the input voltage. This Multitrack concept can be used together with many other design techniques for PFC systems to create mutual advantages in many function blocks. A prototype 150 W, universal ac input, 12 VDC output, isolated Multitrack PFC system with a power density of 50 W/in 3 and a peak end-to-end efficiency of 92% has been built and tested to verify the effectiveness of the Multitrack PFC architecture.

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