Novel Vertical Power MOSFET With Step Hk Insulator Close to Super Junction Limit Relationship Between Breakdown Voltage and Specific ON-Resistance by Improving Electric Field Modulation

Duan, Baoxing; Wang, Yulong; Wang, Yandong; Dong, Ziming; Yang, Yintang

doi:10.1109/ted.2021.3105079

Cited by 6 publications

(4 citation statements)

References 12 publications

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“…In [12], a structure is proposed where a HK dielectric region alternates with the drift region laterally. This arrangement increases the electric field strength at the interface, resulting in a more uniform overall electric field distribution and higher BV [12][13][14][15]. Another method is to replace the gate dielectric of TMOS with an HK dielectric material [16][17][18].…”

Section: Introductionmentioning

confidence: 99%

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

Yao,

Liu,

et al. 2024

IET Power Electronics

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This paper proposes and investigates a novel 4H‐SiC trench MOSFET (TMOS) with integrated high‐K deep trench and gate dielectric (INHK‐TMOS). The integrated high‐K (INHK) consists of a high‐K gate dielectric and an extended high‐K deep trench dielectric in the drift region. Firstly, the high‐K gate dielectric together with the metal‐forming high‐K metal gate structure, which increases the gate oxide capacitance (COX), reduces the threshold voltage (VTH) and the specific on‐resistance (Ron,sp). Secondly, the extended high‐K deep trench dielectric not only modulates the electric field in the drift region by introducing a new electric field peak at the bottom of the high‐K deep trench dielectric, thereby enhancing the breakdown voltage (BV), but also improves the doping concentration (ND) of the drift region by the assist depletion effect of the high‐K dielectric, further optimizing the forward conduction characteristics. Simulation results demonstrate that when compared to the conventional TMOS, the INHK‐TMOS using HfO2 exhibits a 52.6% reduction in VTH, a 52.1% reduction in Ron,sp, a 20.3% increasement in BV and a 202.3% improvement in figure of merit.

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Section: Introductionmentioning

confidence: 99%

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

Yao,

Liu,

et al. 2024

IET Power Electronics

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“…Considering the wide range of applications of Power MOSFET transistors, various research has been carried out in this field to improve the on-resistance and breakdown voltage [4][5][6][7][8][9][10][11][12]. In the following, the main idea of some of these papers has been reported.…”

Section: Introductionmentioning

confidence: 99%

“…By using this method, the on-resistance and the breakdown voltage of the device have been improved. In [6], by using the concept of high-k dielectric, a new VDMOSFET structure has been presented which is called step highk VDMOSFET. In this structure, the various thickness of the high-k insulator modulates the vertical electric field distribution in the drift region, which increases the breakdown voltage of the step high-k VDMOSFET.…”

Section: Introductionmentioning

confidence: 99%

Superior performance in double-diffused MOSFET by multi-trench gate structure: physical investigation and design

Shokouhi Shoormasti,

Abbasi,

Orouji

2024

Phys. Scr.

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The Double-diffused Metal-Oxide-Semiconductor (D-MOSFET) is the first Power MOSFET structure to be widely used across an extensive range of power levels. This article describes a physical investigation and design of D-MOSFET construction with superior performance. We introduce a groundbreaking exploration into the design of trench gates within U-shaped double-diffused MOSFETs (UDMOSFETs), focusing on Baliga's figure of merit (BFOM). The findings provide valuable insights for advancing power semiconductor devices, underscoring the importance of trench gate technology in optimizing device performance. The BFOM reaches its peak when the doping concentration of the drift region (NDrift) is 6×1016 cm-3 with an indication of almost 40% improvement in MTG-UDMOSFET (M=4) compared to C-UDMOSFET. Furthermore, within the optimum values of NDrift, length of the drift region, and depth of trench gate, the on-resistance in MTG-UDMOSFET (M=4) experiences a 46% reduction compared to the conventional structure.

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“…With the rapid development of the power IC industry, LDMOS has been widely adopted due to its great compatibility with CMOS processes [2]. The tradeoff between the specific ON-resistance (R on,sp ) and breakdown voltage (BV) is a major issue to be considered in the design of SOI LDMOS [3], [4], [5], [6], [7]. In order to obtain the high breakdown characteristics and reduce the specific ON-resistance, high-k dielectric is employed in the SOI LDMOS.…”

Section: Introductionmentioning

confidence: 99%

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

Yao

Sun

et al. 2023

IEEE Trans. Electron Devices

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The silicon-on-insulator (SOI) lateral doublediffused metal-oxide-semiconductor (LDMOS) with high-k multi-fingers (HKMFs) is proposed and investigated. The fingertips are distributed at specific locations to modulate the electric field distributions and improve the device performances. First, the electric field peaks formed at the fingertips could optimize the electric field distributions, which improves the breakdown voltage (BV) of the LDMOS effectively. Meanwhile, the multi-fingers are embedded into the drift region to increase the optimal drift doping concentration, which facilitates the positive conduction of the device and reduces the specific ON-resistance (R on,sp ). The simulation results show that the proposed HKMF-LDMOS with five multi-fingers increases the BV by 59.2%, reduces R on,sp by 37.8%, and improves the figure of merit (FOM) by 4.07 times when compared to the conventional LDMOS.

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Novel Vertical Power MOSFET With Step Hk Insulator Close to Super Junction Limit Relationship Between Breakdown Voltage and Specific ON-Resistance by Improving Electric Field Modulation

Cited by 6 publications

References 12 publications

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

Investigations of 4H‐SiC trench MOSFET with integrated high‐K deep trench and gate dielectric

Superior performance in double-diffused MOSFET by multi-trench gate structure: physical investigation and design

SOI LDMOS With High-k Multi-Fingers to Modulate the Electric Field Distributions

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