NURA: a feasible, gas-dielectric interconnect process

Anand, M.B.; Yamada, Masaki; Shibata, H.

doi:10.1109/vlsit.1996.507801

Cited by 10 publications

(3 citation statements)

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“…In the flow of the low-k dielectric implementation process [Fig. 9(b)], [22] the trenches are firstly etched in the insulator film, which is located in the low k dielectric regions, and subsequently, carbon is produced during either a physical or a chemical vapor deposition, which fills up the trenches with carbon. Next, an approximately 50nm-thick thin insulator film is deposited over the low k dielectric area.…”

Section: -4mentioning

confidence: 99%

Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench

et al. 2022

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A lateral insulated gate bipolar transistor (LIGBT) based on silicon-on-insulator (SOI) structure is proposed and investigated. This device features a compound dielectric buried layer (CDBL) and an assistant-depletion trench (ADT). The CDBL is employed to introduce two high electric field peaks that optimize the electric field distributions and that, under the same breakdown voltage (BV) condition, allow the CDBL to acquire a drift region of shorter length and a smaller number of stored carriers. Reducing their numbers helps in fast-switching. Furthermore, the ADT contributes to the rapid extraction of the stored carriers from the drift region as well as the formation of an additional heat-flow channel. The simulation results show that the BV of the proposed LIGBT is increased by 113% compared with the conventional SOI LIGBT of the same length L D. Contrastingly, the length of the drift region of the proposed device (11.2 μm) is about one third that of a traditional device (33 μm) with the same BV of 141 V. Therefore, the turn-off loss (E OFF) of the CDBL SOI LIGBT is decreased by 88.7% compared with a conventional SOI LIGBT when the forward voltage drop (V F) is 1.64 V. Moreover, the short-circuit failure time of the proposed device is 45% longer than that of the conventional SOI LIGBT. Therefor, the proposed CDBL SOI LIGBT exhibits a better V F–E OFF tradeoff and an improved short-circuit robustness.

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Section: -4mentioning

confidence: 99%

Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench

et al. 2022

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“…The conceptual feasibility of such schemes has been demonstrated. 6,7) However, as may be expected, the biggest engineering issue in air-dielectric schemes is one of mechanical stability.…”

Section: Introductionmentioning

confidence: 98%

A Study of Mechanical Stability Issues in Multilevel Air-Dielectric Interconnect Schemes for ULSIs

Anand¹,

Yamada²,

Shibata³

1999

Jpn. J. Appl. Phys.

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Air-dielectric interconnect schemes are under active consideration for use in high performance LSIs because they can improve speed significantly. However, mechanical stability is the biggest engineering issue in these schemes. In this paper, an investigation of mechanical stability issues is presented. It is found that the deflection of the wires due to their own weight is unlikely to be a problem. For a typical long wire cross-section of 2 µm × 2 µm, wires of length slightly more than 1mm can be allowed without appreciable sag. On the other hand, it is found that the initial tensile stress in the metal wires produces significant bending stresses at the bottom of the via plugs. The dependence of the bending stress on various geometrical parameters is studied in detail. It is found that bending stresses of more than 1 GPa can result even for a very low initial tensile stress in the wire of 20 MPa.

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“…The other method is based on sacrificial-layer decomposition. [9][10][11][12][13][14] First, metal interconnects with a sacrificial material as an intermetal dielectric are fabricated. Next, an overcoat layer is deposited on the surface.…”

Section: Introductionmentioning

confidence: 99%

Characterization of Air-Gap Sealing with Organic Dielectric Using Spin-Coating Film Transfer and Hot-Pressing Technology

Satô

Machida

Ishii

et al. 2007

jjap

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This paper describes a dielectric material and its application to sealing air gaps using spin-coating film transfer and hot-pressing (STP) technology. STP technology is a new film-formation process that consists of spin coating a dielectric material on a base film, hot pressing the dielectric film on a wafer with gaps in a vacuum chamber, and peeling the base film off the dielectric adhered to the wafer. In order to seal the gaps with thin dielectric films, it is necessary to prevent the dielectric from breaking during the peel-off step. Thus, a dielectric of poly(benzoxazole) (PBO) with additives for reducing the adhesion strength between the dielectric and the base film is proposed. The experimental results show that 0.3-µm-wide gaps can be sealed with dielectric films as thin as 0.25 µm without film breaking. The mechanism by which adhesion strength decreases in the peel-off step is discussed in terms of its dependence on the proportion of additives. The synergy of the STP process and the type of dielectric material used paves the way for the development of future interconnect schemes using air gaps.

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NURA: a feasible, gas-dielectric interconnect process

Cited by 10 publications

References 0 publications

Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench

Fast-switching SOI-LIGBT with compound dielectric buried layer and assistant-depletion trench

A Study of Mechanical Stability Issues in Multilevel Air-Dielectric Interconnect Schemes for ULSIs

Characterization of Air-Gap Sealing with Organic Dielectric Using Spin-Coating Film Transfer and Hot-Pressing Technology

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