On Extra Combinational Delays in SRAM FPGAs Due to Transient Ionizing Radiations

Abstract

This paper presents a new experimental setup (to our knowledge, the first ever) and results obtained with that setup from which we report extra combinational delays in an SRAM FPGA (Virtex-5) due to transient ionizing radiations. The results, obtained by proton irradiation at the TRIUMF laboratory, show that our setup can detect extra combinatorial delays as small as 40 ps, and that delays of more than 400 ps can affect the targeted FPGA. These results strongly suggest that delay faults can potentially be induced by transient ionizing radiations.

On Extra Delays Affecting I/O Blocks of an SRAM-Based FPGA Due to Ionizing Radiation

“…In this particular case, two ODCs can be distinguished, at about 10 (0.14 ns) and 15 (0.62 ns) sec. Note that as stated in [11], ODCs equivalent frequency measurement resolution is 72 Hz. Again here, there is a good fit between the emulation experiments and the irradiation experiments results.…”

“…2. This setup is similar to the one used in our previous experiments at TRIUMF [11]. It comprises the same commercial FPGA-based test board (Digilent Genesys, also used in the first emulation setup), a daughter board (custom PCB) with a 74AC04 chip (with 6 inverters operating at V), the spectrum analyzer used in the first emulation setup, and a remote PC to perform the same tasks of (re)load and read back of the configuration bits.…”

“…The most commonly considered impacts of a bit-flip on these configuration bits are opens and shorts. This paper is a follow up of [11], where it was shown that additional delays could also be induced in SRAM-based FPGA cores by such configuration bit flips. Here we present results showing that very significant changes to path delays can also be induced in IOBs, leading to potential delay faults.…”

“…Section III introduces the first emulation setup used to investigate delays in IOBs. This emulation setup is based on a simple ring oscillator (RO), derived from [11] and implemented on a Xilinx Virtex-5 FPGA. A first set of emulation results is reported in Section IV.…”

Circuit Level Modeling of Extra Combinational Delays in SRAM-Based FPGAs Due to Transient Ionizing Radiation

“…The sensitivity to radiation of SRAM-based FPGAs has been studied over the years [3]- [7]. The first report on extra combinational delays due to transient ionizing radiations was recently presented in [8] where their existence due to Single-Event-Upsets (SEUs) induced by proton radiation was experimentally observed. Manuscript The main contribution of this paper is the validation of the root causes of extra combinatorial delays, also called Observed Delay Changes (ODCs), on SRAM-based FPGA through circuit level simulations of the internal circuitry of Configurable Logic and I/O Blocks [9]- [11] and their interconnections.…”