Optimization of Constant Matrix Multiplication with Low Power and High Throughput

Kumm, Martin; Hardieck, Martin; Zipf, Peter

doi:10.1109/tc.2017.2701365

Cited by 23 publications

(34 citation statements)

References 36 publications

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“…Finally, we address the calculation in Fig. 4(d) as a CMM problem [31]. The exact algorithms that we consider for the implementation of the rotators are shown in Table III. 4) Selection of the best rotators: For each rotation angle in the FFT, the previous steps provide a number of coefficients with certain W L E , implemented according to the multiple architectures in Fig.…”

Section: A Design Of the Rotatorsmentioning

confidence: 99%

“…We want to thank the authors of the works [22], [24]- [26], [31] for making available their approaches for shift-and-add constant multiplications. Throughout the paper, all rotators were considered only for angles in the range α ∈ [−45 • , 0 • ].…”

Section: Acknowledgementsmentioning

confidence: 99%

“…The fact that all rotators in a fully parallel FFT rotate by a constant angle allows for using advanced shift-and-add constant multiplication techniques to minimize their resource complexity. In our approach, we exploit the use of existing methods for constant multiplications, including single constant multiplication (SCM) [22], [23], multiple constant multiplication (MCM) [24]- [28] and constant matrix multiplication (CMM) [29]- [31]. With the aim of designing the most efficient rotators, we also exploit different approaches to implement rotators in hardware.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s

Garrido

Möller

Kumm

2019

IEEE Trans. Circuits Syst. I

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Section: A Design Of the Rotatorsmentioning

confidence: 99%

Section: Acknowledgementsmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s

Garrido

Möller

Kumm

2019

IEEE Trans. Circuits Syst. I

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“…Kumm et al [Kumm et al 2017] propose a method to perform subexpression elimination with integer values. The algorithm looks at all the outputs of a matrix-vector multiplication and calculates the minimal tree depth, d, required to get the results.…”

Section: Rpag Algorithmmentioning

confidence: 99%

Unrolling Ternary Neural Networks

Tridgell

Kumm

Hardieck

et al. 2019

ACM Trans. Reconfigurable Technol. Syst.

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The computational complexity of neural networks for large scale or real-time applications necessitates hardware acceleration. Most approaches assume that the network architecture and parameters are unknown at design time, permitting usage in a large number of applications. This paper demonstrates, for the case where the neural network architecture and ternary weight values are known a priori, that extremely high throughput implementations of neural network inference can be made by customising the datapath and routing to remove unnecessary computations and data movement. This approach is ideally suited to FPGA implementations as a specialized implementation of a trained network improves efficiency while still retaining generality with the reconfigurability of an FPGA. A VGG style network with ternary weights and fixed point activations is implemented for the CIFAR10 dataset on Amazon's AWS F1 instance. This paper demonstrates how to remove 90% of the operations in convolutional layers by exploiting sparsity and compile-time optimizations. The implementation in hardware achieves 90.9 ± 0.1% accuracy and 122 k frames per second, with a latency of only 29 µs, which is the fastest CNN inference implementation reported so far on an FPGA.

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“…The CMM problem is defined as finding a solution using adders, subtracters, and shifts that realizes the computation using a few adders and subtracters as possible [1][2][3][4][5][6][7]. As adders and subtracters have about the same complexity, we will from here refer to both as adders, and the number of adders as the adder cost.…”

Section: Introductionmentioning

confidence: 99%

Using Transposition to Efficiently Solve Constant Matrix-Vector Multiplication and Sum of Product Problems

Sarband

Gustafsson

Garrido

2020

J Sign Process Syst

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In this work, we present an approach to alleviate the potential benefit of adder graph algorithms by solving the transposed form of the problem and then transposing the solution. The key contribution is a systematic way to obtain the transposed realization with a minimum number of cascaded adders subject to the input realization. In this way, wide and low constant matrix multiplication problems, with sum of products as a special case, which are normally exceptionally time consuming to solve using adder graph algorithms, can be solved by first transposing the matrix and then transposing the solution. Examples show that while the relation between the adder depth of the solution to the transposed problem and the original problem is not straightforward, there are many cases where the reduction in adder cost will more than compensate for the potential increase in adder depth and result in implementations with reduced power consumption compared to using sub-expression sharing algorithms, which can both solve the original problem directly in reasonable time and guarantee a minimum adder depth. Keywords Constant matrix multiplication (CMM) • Multiple constant multiplication (MCM) • Shift-and-add • Sum of products (SOP) • Minimum depth expansion algorithm.

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Optimization of Constant Matrix Multiplication with Low Power and High Throughput

Cited by 23 publications

References 36 publications

World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s

World’s Fastest FFT Architectures: Breaking the Barrier of 100 GS/s

Unrolling Ternary Neural Networks

Using Transposition to Efficiently Solve Constant Matrix-Vector Multiplication and Sum of Product Problems

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