Outperformance of Cu pillar flip chip bumps in electromigration testing

Abstract

Standard NiAu/SAC (SnAgCu) solder bumps are compared with Cu pillar bumps in terms of their electromigration behavior. Both bump configurations are flip chipped onto package substrates with a thick Cu finish. The Cu pillar bumps, which are soldered with a thin SnAg cap, outperform the standard solder flip chip bumps due to the fast formation of an intermetallic phase which covers the full solder stand-off height. These bumps do not show any significant electromigration damage and do not fail within reasonable testing times and test conditions. For the standard solder flip chip bumps, micro-structural degradation at the NiAu chip metallization coincides with an according bump resistance increase which can be clearly monitored for all different test conditions. The electromigration parameters are calculated to be 0.90eV for the activation energy Q and 1.69 for the current density exponential factor n.A TaN temperature sensor is incorporated in the test chip which allows in-situ measurements of the actual device temperature. This value may deviate from the ambient temperature due to Joule heating. Fuse tests in which the current is gradually ramped up to a maximum of 3A while the resulting temperature rise is simultaneously monitored, are performed. In general, the thermal performance of the pillar bump exceeds the one of the solder bump.

Heterogeneous 2.5D integration on through silicon interposer

“…Figure 29 shows SEM images of solder bumps under thermal stress without and with EM stress for both standard solder bump and Cu pillar bump. 72 Standard bumps with Ni/Au UBM show a consistent failure mechanism of micro-structural degradation through void formation at the interface of solder and IMC, and this occurs for all test conditions used C and 300-500 mA). However, Cu pillar bumps did not show any electrical, nor micro-structural degradation.…”

“…72 A clear difference in EM behavior was observed between standard NiAu/SAC and Cu pillar bumps. Figure 29 shows SEM images of solder bumps under thermal stress without and with EM stress for both standard solder bump and Cu pillar bump.…”

Accelerated Life Tests of Flip-Chips With Solder Bumps Down to 30 μm Diameter

“…The solder alloy in those very tiny solder bumps makes EM testing mandatory, as high current densities and high temperatures are expected. Work performed by other authors shows that EM performance can be improved by transforming Sn into tin-copper intermetallics (IMCs) [9]. If, as in our experiments, parts with large CTE mismatch are used, thermal cycling performance would decrease dramatically due to the low ductility of the intermetallic compounds [10].…”

Effects of Temperature and Current Stressing on the Intermetallic Compounds Growth Characteristics of Cu Pillar/Sn–3.5Ag Microbump

“…[9][10][11][12][13][14] Another approach that has been reported for packages with pillar microbumps shows that a smaller bump resistance increase with current when the standard solder bumps and Cu pillar microbumps are compared in terms of their electromigration performance. 25) That is, the electromigration behavior of a Cu pillar microbump under current-stressing conditions was more stable than that of a conventional solder bump because the failure occurred in the Al trace rather than in the Cu pillar microbump.…”

“…Usually, Cu pillar microbumps are compared with standard solder bumps in terms of their electromigration and mechanical behavior. Labie et al 25) have been reported that compared with the pillar bumps, solder bumps show a larger temperature increase with current, which is particularly obvious as soon as the melting point of the solder is reached. Zhan et al 26) have studied the mechanical reliability of micro joints with different bonding conditions by using the die shear test.…”