Metrology, Inspection, and Process Control XXXVI 2022
DOI: 10.1117/12.2608319
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Overlay challenges in 3D heterogeneous integration

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Cited by 8 publications
(10 citation statements)
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“…Even more specialized applications or better performances could be obtained through hybrid bonding pitch reduction [1]. High quality bonding for 3D technology has been demonstrated using an accurate wafer bonding tool with optimized metrology [2].…”
Section: Overlay: Metrology and Optimizationmentioning
confidence: 99%
“…Even more specialized applications or better performances could be obtained through hybrid bonding pitch reduction [1]. High quality bonding for 3D technology has been demonstrated using an accurate wafer bonding tool with optimized metrology [2].…”
Section: Overlay: Metrology and Optimizationmentioning
confidence: 99%
“…This transformation will only accelerate in the coming years as pitch and dimensional scaling of connections between the die and wafer-scale carriers improves to enable complex multi-die architectures in a single-die format. Advanced packaging drives additional new challenges such as (1) tighter on-product OVL (OPO), (2) requirements for high resolution and high depth of focus imaging, and (3) measurability through multiple layers of opaque materials that are attributed to 3D substrate stacking processing. A detailed overview of OVL challenges in 3D heterogeneous integration was presented in previous work [1].…”
Section: Introductionmentioning
confidence: 99%
“…Advanced packaging drives additional new challenges such as (1) tighter on-product OVL (OPO), (2) requirements for high resolution and high depth of focus imaging, and (3) measurability through multiple layers of opaque materials that are attributed to 3D substrate stacking processing. A detailed overview of OVL challenges in 3D heterogeneous integration was presented in previous work [1].…”
Section: Introductionmentioning
confidence: 99%
“…In the semiconductor industry, three-dimensional (3-D) integration technology in the 'More than Moore' era is a promising solution for meeting the increasing requirements of high transistor density and fast data transmission in the sixth generations mobile communications, Internet of Things, and artificial intelligence fields, playing a key role in advanced package technologies such as system in package, package on package, waferlevel packaging, and system on chip [1][2][3]. Bonding is a key technology for 3-D vertical interconnection.…”
Section: Introductionmentioning
confidence: 99%
“…3 Sn/Cu 6 Sn 5 /Cu 3 Sn/Cu. Sn had been completely depleted and converted into two kinds of IMCs, i.e., Cu 6 Sn 5 and Cu 3 Sn, which obeyed the transformation reactions in equation 3:…”
mentioning
confidence: 99%