Paralleling GaN HEMTs for diode-free bridge power converters

Abstract

GaN devices have superior performance over Sibased devices, and high voltage normally-off GaN HEMTs with cascode structure have been available for industry application as they can be easily driven by mature commercial Si-MOSFET drivers. Due to the very fast switching speed, the PCB layout and driver circuit design should be very careful to keep the parasitic parameters as small as possible. Paralleling semiconductor devices is an effective and simple way for higher power application. It is very challenging to parallel GaN HEMTs in hard-switching bridge power converter application, especially for discrete leaded package devices. However, leaded packages are still dominant in industrial applications because of their simplicity for PCB assembly and capability for a wide variety of heat-sinking techniques. In this paper, a solution to paralleling GaN HEMTs for diode-free bridge power converters is proposed, and GaN device driver design is discussed. The partial phase method is also suitable for the low power application to improve the efficiency. Simulations of driving circuit and experimental results on a 5 kW half bridge operating in synchronous boost mode with 4 paralleling GaN HEMTs are provided for validation.

Desynchronizing Paralleled GaN HEMTs to Reduce Light-Load Switching Loss

“…The corresponding errors between the measured and calculated time delays are -3 ns (2.3%), 1 ns (1%), 3 ns (3.5%), 5 ns (5.1%), 7 ns (7.1%), 4 ns (4.1%), which are small. Therefore, the developed time delay models (28) and (29) are accurate.…”

“…However, these approaches need multiple high-bandwidth current sensors and analog feedback control which are difficult to fabricate and complicated to implement [14], [17], [30], [31]. Recently, the passive current balancing approaches [14], [17], [29]- [31] become popular due to their simplicity and robustness. In these works, inversely-coupled inductors are added to the paralleled SiC and GaN transistors; a high differential-mode impedance can be formed and it is able to alleviate the current imbalance among paralleled devices.…”

Paralleled Operation of High-Voltage Cascode GaN HEMTs

“…The symmetry of the main loop layout was emphasized. In 2015, a four cascode GaN HEMTs based half-bridge circuit was demonstrated [11].…”

Evaluation of high voltage cascode GaN HEMTs in parallel operation

“…The symmetry of the main loop layout was emphasized. In 2015, a four cascode GaN HEMTs based half-bridge circuit was demonstrated [8]. An additional coupled inductor was used to compensate the current imbalance between devices.…”