2014 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 2014
DOI: 10.1109/iccad.2014.7001419
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Pragma-based floating-to-fixed point conversion for the emulation of analog behavioral models

Abstract: Design teams have embraced hardware verification accelerators that enable pre-silicon firmware development. However, emulation is inapplicable for large mixed signal designs. We introduce a methodology that allows for the reuse of analog behavioral models in verification accelerators. We provide a set of pragmas that allow real number models to be converted to fixed point and synthesized and introduce an approach for demonstrating the correctness of these models. We demonstrated this by emulating a large cellu… Show more

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Cited by 6 publications
(3 citation statements)
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“…As for fully-digital designs' verification, emulation platforms can offer substantial speedups to the verification flow of mixedsignal models. The work presented in [9] takes advantage of this speedup by implementing a pragma-based conversion tool that generates synthesizable models. Following designers' annotations, it converts analog real-typed signals to a fixed-point representation.…”
Section: State Of the Artmentioning
confidence: 99%
“…As for fully-digital designs' verification, emulation platforms can offer substantial speedups to the verification flow of mixedsignal models. The work presented in [9] takes advantage of this speedup by implementing a pragma-based conversion tool that generates synthesizable models. Following designers' annotations, it converts analog real-typed signals to a fixed-point representation.…”
Section: State Of the Artmentioning
confidence: 99%
“…Emulating AMS designs on those platforms, or even on off-the-shelf FPGA boards, requires that analog blocks are replaced by synthesizable models. A wide variety of strategies for doing just that have been reported, covering applications such as power conversion [8], [9], high-speed communication [10], [11], signal conditioning [12], [13], analog-to-digital conversion [14], and analog testing [15]. Reported speedups typically ranged from two to three orders of magnitude as compared to CPU-based simulation.…”
Section: Related Workmentioning
confidence: 99%
“…For example, Xilinx System Generator and Simulink HDL Coder have been used to create models for small analog circuits, outside the context of a full chip design [8], [16]. At a much larger scale, F. Nothaft [11] emulated a full cellular modem IC using a tool for converting existing real-number Verilog models of AMS blocks to fixed-point (the tool was not publicly released). Overview of our AMS emulation framework.…”
Section: Related Workmentioning
confidence: 99%