Predictable Out-of-Order Execution Using Virtual Traces

Whitham, Jack; Audsley, Neil

doi:10.1109/rtss.2008.9

Cited by 4 publications

(2 citation statements)

References 23 publications

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“…In this field, much research has been focused on the CPU [10,19,37], where worstcase behavior can be difficult to determine. Specific problems found in conventional designs include timing anomalies [18] and effects that can occur in branch predictors.…”

Section: Related Workmentioning

confidence: 99%

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Implementing time-predictable load and store operations

Whitham

Audsley

2009

Proceedings of the Seventh ACM International Conference on Embedded Software

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Scratchpads have been widely proposed as an alternative to caches for embedded systems. Advantages of scratchpads include reduced energy consumption in comparison to a cache and access latencies that are independent of the preceding memory access pattern. The latter property makes memory accesses time-predictable, which is useful for hard real-time tasks as the worst-case execution time (WCET) must be safely estimated in order to check that the system will meet timing requirements.However, data must be explicitly moved between scratchpad and external memory as a task executes in order to make best use of the limited scratchpad space. When dynamic data is moved, issues such as pointer aliasing and pointer invalidation become problematic. Previous work has proposed solutions that are not suitable for hard real-time tasks because memory accesses are not time-predictable. This paper proposes the scratchpad memory management unit (SMMU) as an enhancement to scratchpad technology. The SMMU implements an alternative solution to the pointer aliasing and pointer invalidation problems which (1) does not require whole-program pointer analysis and (2) makes every memory access operation time-predictable. This allows WCET analysis to be applied to hard-real time tasks which use a scratchpad and dynamic data, but results are also applicable in the wider context of minimizing energy consumption or average execution time. Experiments using C software show that the combination of an SMMU and scratchpad compares favorably with the best and worst case performance of a conventional data cache.

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Section: Related Workmentioning

confidence: 99%

“…CPU analysis often assumes a time-predictable memory subsystem (e.g. perfect data caches [19]), while explicitly time-predictable CPU designs assume that scratchpads will be used [16,24,37]. All of this work could benefit from the SMMU.…”

Section: Related Workmentioning

confidence: 99%