Process flow innovations for photonic device integration in CMOS

Abstract

Multilevel thin film processing, global planarization and advanced photolithography enables the ability to integrate complimentary materials and process sequences required for high index contrast photonic components all within a single CMOS process flow. Developing high performance photonic components that can be integrated with electronic circuits at a high level of functionality in silicon CMOS is one of the basic objectives of the EPIC program sponsored by the Microsystems Technology Office (MTO) of DARPA. Our research team consisting of members from: BAE Systems, Alcatel-Lucent, Massachusetts Institute of Technology, Cornell University and Applied Wave Research reports on the latest developments of the technology to fabricate an application specific, electronic-photonic integrated circuit (AS_EPIC). Now in its second phase of the EPIC program, the team has designed, developed and integrated fourth order optical tunable filters, both silicon ring resonator and germanium electro-absorption modulators and germanium pin diode photodetectors using silicon waveguides within a full 150nm CMOS process flow for a broadband RF channelizer application. This presentation will review the latest advances of the passive and active photonic devices developed and the processes used for monolithic integration with CMOS processing. Examples include multilevel waveguides for optical interconnect and germanium epitaxy for active photonic devices such as p-i-n photodiodes and modulators.

Optical propagation and refraction in silicon complementary metal–oxide–semiconductor structures at 750 nm: toward on-chip optical links and microphotonic systems

“…Si nitride and Si oxi-nitride are transparent for wavelengths longer than 600 nm. [25][26][27] This is substantially lower than the absorption edge of Si, which lies at 1100 nm. If Si LEDs and Si p − n detectors are used, Si CMOS technology does not have to rely on III-V or Si-Ge technology.…”

“…23,24 Other transparent layers such as Si oxi-nitride and Si dioxide can be added as further overlayers. [25][26][27] The optical transparency of the different layers varies slightly. The dimensions and optical variables as associated with above 0.35 μm CMOS integrated circuit technology are presented in Table 1.…”

Integrating Micro-Photonic Systems and MOEMS into Standard Silicon CMOS Integrated Circuitry

“…The inter-metallic oxide, positioned between metallic layers, are CVD plasma deposited and mainly used as electrical isolation between the metal layers. Literature surveys (Beals et al , 2008, Gorin et al, 2008 show that, even so, these layers are porous, they offer suitable propagation for the longer mid infra-red wavelengths, where structural defects, such as porosity, grain boundaries and side wall scattering due to roughness play a lesser role . The metallic layers bonding to the oxide inter-metallic oxide layers can be used as effective reflectors or optical confinement layers.…”

Atac

“…Advances in electronic-photonic integration have enabled optical interconnect technologies with greater integration, smaller distances, and higher bandwidths [21], [22], [15], [28]. Further, recent research [19] has shown that optical devices can be built using standard CMOS processes, thereby allowing optics to replace global wires and on-chip buses [1].…”