Proof of concept for through silicon vias in application-specific integrated circuits for hard x-ray imaging detectors

Abstract

Application-specific integrated circuits (ASICs) are commonly used to efficiently process the signals from sensors and detectors in space. Wire bonding is a space-qualified technique of making interconnections between ASICs and their substrate packaging board for power, control, and readout of the ASICs. Wire bonding is nearly ubiquitous in modern space programs, but their exposed wires can be prone to damage during assembly and subject to electric interference during operations. Additional space around the ASICs needed for wire bonding also impedes efficient packaging of large arrays of detectors. Here, we introduce the through silicon vias (TSV) technology that replaces wire bonds and eliminates their shortcomings. We have successfully demonstrated the feasibility of implementing TSVs to existing ASIC wafers (a.k.a. a via-last process) developed for processing the x-ray signals from the x-ray imaging CdZnTe detectors on the Nuclear Spectroscopic Telescope Array small explorer telescope mission that was launched in 2012. While TSVs are common in the semiconductor industry, this is the first (to our knowledge) successful application for astrophysics imaging instrumentation. We expect that the TSV technology will simplify the detector assembly and thus will enable significant cost and schedule savings in assembly of large area CdZnTe detectors.

Testing Station for Fast Screening of Through Silicon Via (TSV)-enabled Application Specific Integrated Circuits (ASICs) for Hard X-ray Imaging Detectors

“…A histogram of FWHM resolutions of the 1022 active pixels from the back-side TSV NuASIC is found in Figure 8. We find an improved average resolution (0.54% FWHM) in comparison to data reported in Hong et al (2021) 7 from NuASIC internal pulser testing with a traditional probe station on the wafer level prior to dicing. This indicates that the testing performance of the ATS is stable and a capable replacement to traditional probe card testing.…”

“…While these devices returned high resolution pulser spectra at first, the functionality of the front-side TSV NuASICs degraded quickly with increasing current draws, becoming unresponsive in approximately 10 minutes of operation time. 7 While this prevented a full ATS scan of a front-side TSV NuASIC, we performed limited testing on regions of pixels with the spectral resolution of the internal pulser reported in Figure 9. We tested two 8 × 8 patches of pixels on opposite corners of the front-side TSV NuASIC and between tests observed a shift in peak ADU value which may be a result of the device's changing performance.…”

“…Both pixel patches' FWHM spectral resolution remained less than 2% of the total ADU value, similar to wafer-level testing performed and reported in Hong et al (2021). 7 The low yield in front-side TSV NuASICs from the first experimental run most likely results from an insufficient amount of insulation or isolation around the TSVs and is being further explored.…”

“…TSVs offer an alternative to wire bonds for connecting each NuASIC to the readout electronics system. 7 TSVs are metallized vias that connect the wire bond pads on the top surface of the NuASIC with a staggered array of pads on the bottom surface (Fig. 2).…”

“…In a "via-last" approach, the NuASIC's 8-inch silicon wafers are mounted to a carrier wafer for mechanical stability before thinning, etching and metallization as described in Hong et al (2021). 7 After TSV implementation, traces and pads are plated to the back side of the NuASIC before lead solder balls are deposited on the NuASIC pads for later flip-chip bonding. Finally, the carrier wafer is detached and the new TSV NuASICs are diced into 49 individual devices.…”