Proposal and design of a new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications

Kumar, M. Jagadesh; Rao, D.V.

doi:10.1049/ip-cds:20040196

IEE Proc., Circuits Devices Syst.

2004

DOI: 10.1049/ip-cds:20040196

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Proposal and design of a new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications

M. Jagadesh Kumar

D.V. Rao

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Cited by 4 publications

References 11 publications

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Realising wide bandgap P-SiC-emitter lateral heterojunction bipolar transistors with low collector–emitter offset voltage and high current gain: a novel proposal using numerical simulation

Kumar

Reddy

2004

IEE Proc., Circuits Devices Syst.

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The authors report a novel method to reduce the collector-emitter offset voltage of the wide bandgap SiC-P-emitter lateral HBTs using a dual-bandgap emitter. In their approach, the collector-emitter offset voltage V CE(offset) is reduced drastically by eliminating the built-in potential difference between the emitter-base (EB) and collector-base (CB) junctions by using a SiC-on-Si P-emitter. It is demonstrated that the proposed dual-bandgap P-emitter HBT, together with the SiGe base and Schottky collector, not only has a very low V CE(offset) but also exhibits high current gain, reduced Kirk effect, excellent transient response and high cutoff frequency. The performance of the proposed device is evaluated in detail using two-dimensional device simulation, and a possible BiCMOS compatible fabrication procedure is also suggested.

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Realising wide bandgap P-SiC-emitter lateral heterojunction bipolar transistors with low collector–emitter offset voltage and high current gain: a novel proposal using numerical simulation

Kumar

Reddy

2004

IEE Proc., Circuits Devices Syst.

Self Cite

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A New High Breakdown Voltage Lateral Schottky Collector Bipolar Transistor on SOI: Design and Analysis

Kumar

Roy

2005

IEEE Trans. Electron Devices

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New Schottky-Gate Bipolar-Mode Field-Effect Transistor (SBMFET): Design and Analysis Using Two-Dimensional Simulation

Kumar

Bahl²

2006

IEEE Trans. Electron Devices

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A new Schottky-gate Bipolar Mode Field Effect Transistor (SBMFET) is proposed and verified by two-dimensional simulation. Unlike in the case of conventional BMFET, which uses deep diffused p + -regions as the gate, the proposed device uses the Schottky gate formed on the silicon planar surface for injecting minority carriers into the drift region. The SBMFET is demonstrated to have improved current gain, identical breakdown voltage and ON-voltage drop when compared to the conventional BMFET. Since the fabrication of the SBMFET is much simpler and obliterates the need for deep thermal diffusion of P+-gates, the SBMFET is expected to be of great practical importance in medium-power high-current switching applications.

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Proposal and design of a new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications

Cited by 4 publications

References 11 publications

Realising wide bandgap P-SiC-emitter lateral heterojunction bipolar transistors with low collector–emitter offset voltage and high current gain: a novel proposal using numerical simulation

Realising wide bandgap P-SiC-emitter lateral heterojunction bipolar transistors with low collector–emitter offset voltage and high current gain: a novel proposal using numerical simulation

A New High Breakdown Voltage Lateral Schottky Collector Bipolar Transistor on SOI: Design and Analysis

New Schottky-Gate Bipolar-Mode Field-Effect Transistor (SBMFET): Design and Analysis Using Two-Dimensional Simulation

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