Pseudo-breakdown events induced by biased-thermal-stressing of intra-level Cu interconnects-reliability and performance impact

The Influence Of Complex Geometries And Stress Non-Uniformity On Reliability

“…In a copper (Cu) damascene process the following mechanisms are common: a) copper diffusion at the interface [5,6], b) dielectric breakdown of the bulk low-k material [7], c) Cu extrusion [8] and d) Cu diffusion through metal barrier and bulk material [9]. Here only mechanisms due to a) and b) are assumed because the latter two are regarded more as belonging to an unstable process.…”

Electrical Breakdown in Advanced Interconnect Dielectrics

“…CC type), but within that microscopic region, the damage will be extensive, making it difficult to definitively identify the actual initial site for the breakdown event. Because the electric field is typically highest at the trench top, damage is usually found to be concentrated in that area of the test structure crosssection, unless there is a case where another damage path has triggered failure, such as when metal barrier failure has occurred [93,299]. Also, voids within the IMD or voids on top within the capping dielectric layer have been seen, but their appearance after breakdown may depend upon the capping dielectric composition [298].…”

Dielectric failure mechanisms in advanced Cu/low-k interconnect architecture

“…Therefore, the time-to-failure dependence on the field is mainly dependent on the probability of having sufficient electron energy and not on the precise physical mechanism(s) causing damage, which were described in the previous E and √E models. The time-to-failure (TTF) is then described in equation 2.13, whereby N f is the number of defects needed to promote breakdown; N o is the number of pre-existing defects; A is the pre-exponential term in the P-F emission as depicted in equations 2. between the Cu lines at the top of the trench due to sloped profiles [94,95].…”