2013 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS) 2013
DOI: 10.1109/csics.2013.6659243
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Pure Play GaN Foundry 0.25µm HEMT Technology for RF Applications

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Cited by 9 publications
(8 citation statements)
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“…23 (a)) [121], WIN semiconductors' reliable 50V GaN technology (see Fig. 23 (b)) [122], Raytheon's high power density microwave GaN technology [123], and Qorvo's 0.15µm GaN MMIC Manufacturing Technology [124].…”
Section: Gate/source Field Platementioning
confidence: 99%
See 1 more Smart Citation
“…23 (a)) [121], WIN semiconductors' reliable 50V GaN technology (see Fig. 23 (b)) [122], Raytheon's high power density microwave GaN technology [123], and Qorvo's 0.15µm GaN MMIC Manufacturing Technology [124].…”
Section: Gate/source Field Platementioning
confidence: 99%
“…A novel source-connected air-bridge self-aligned recess field plate is used in Dynax Semiconductor recently to achieve better RF performance and current collapse immunity[120]. The field plate structure is found in many products for RF application, i. e. NXP 0.4µm GaN HEMT (see Fig.23 (a))[121], WIN semiconductors' reliable 50V GaN technology (see Fig.23 (b))[122], Raytheon's high power density microwave GaN technology[123], and Qorvo's 0.15µm GaN MMIC Manufacturing Technology[124].…”
mentioning
confidence: 99%
“…The Au-metal layers consist of 0.6-μm MET0, 1.1-μm SFP, 1.1-μm MET1, and 4-μm MET2. The MET2 layer fulfills global interconnects to obtain low resistivity and high current handling capacity [ 21 , 22 ].…”
Section: Gan Hemt Technology and Characteristicsmentioning
confidence: 99%
“…Hence, the process design kit (PDK) models are accurate for our design in sub-6-GHz. The reliability information of the process can be referred to in [ 21 ].…”
Section: Gan Hemt Technology and Characteristicsmentioning
confidence: 99%
“…The AFRL GaN MMIC process developed from the previous device level efforts supports high efficiency and broadband operation from 0 -40 GHz [13], [14]. Many known manufacturing processes to date use some form of dielectric etch to define gate openings [15], [16]. The process reported here uses a gate-first process to avoid dry-etch damage under the gate which can alter threshold voltage and impact frequency dispersion [17].…”
Section: Introductionmentioning
confidence: 99%