Reliability and characterization of MLC decoupling capacitors with C4 interconnections

Scheider, D.; Hopkins, D.B.; Zucco, P.; Moszczynski, E.; Griffin, M.; Takács, M. P.; Galvagni, J.

doi:10.1109/ectc.1996.517415

Cited by 7 publications

(3 citation statements)

References 4 publications

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“…Voltage performance is better than typical ceramic capacitors ( 0.02%/V for DC voltages below 35 V). Discrete ( 14 nF) capacitors can have a voltage variation of as much as 1.5%/V [15]. It also compares well with integral components.…”

Section: H Summarymentioning

confidence: 91%

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Characterization and performance prediction for integral capacitors in low temperature co-fired ceramic technology

Delaney

Barrett

Barton

et al. 1999

IEEE Trans. Adv. Packag.

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This paper addresses the electrical characterization of integral capacitors in low temperature co-fired ceramic (LTCC). The technology also includes integrated resistors [8]and inductors. It first discusses the geometry and fabrication of the capacitor technology, which uses a novel insert method in LTCC substrates. The structures of 300 special test vehicles made to analyze the technique are described. The samples include components in the range 140 pF to 9.6 nF, and single-layer and two-layer integral formats; structure fabrication capability is currently 7.8 nF/cm 2 . Test vehicle variants, fabricated to analyze the effects of processing parameters such as lamination pressure, are discussed. Measurement systems, which were built to electrically characterize the integral capacitors, are described. The results of the analyzes are summarized with regard to the individual and combined impact of applied frequency, temperature, and DC voltage parameters. The effects of lamination pressure, capacitor size, and the number of dielectric layers are also evaluated. The paper then discusses the development of predictive functions for the induced electrical performance variations in the capacitors, functions that are necessary to enable designers to properly develop circuits for applications in various operating environments. The results of an analysis of the geometry of the capacitors are presented, and are employed by electrical models made using analytical methods, boundary element methods (BEM), and finite element methods (FEM). The models are a requirement for process engineers in optimizing the capacitor fabrication techniques, and for design engineers as means of defining the correct component geometries for their circuits.Index Terms-Electrical modeling, integral capacitors, low temperature co-fired technology (LTCC), multichip modules (MCM), predictive functions, scanning acoustic microscopy (SAM).

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Section: H Summarymentioning

confidence: 91%

“…The technology compares well with ceramic chip capacitors and other recent LTCC integral component techniques [15]- [19]. The range of the test vehicles was 140 pF to 9.6 nF [7.8 nF/cm ], and the 95% confidence interval is less than 1%.…”

Section: H Summarymentioning

confidence: 96%

Characterization and performance prediction for integral capacitors in low temperature co-fired ceramic technology

Delaney

Barrett

Barton

et al. 1999

IEEE Trans. Adv. Packag.

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“…Schneider et al [37] have studied the reliability of decoupling capacitors and subjected them to a variety of tests but these capacitors were not embedded and were composed as a polymer ceramic material as the dielectric. Strydom et al [38] have studied the reliability of integrated inductors from a delamination standpoint.…”

Section: ) Digital Function Reliability: Upfront Process Optimizatiomentioning

confidence: 99%

System-Level Reliability Assessment of Mixed-Signal Convergent Microsystems

Pucha

Hegde

Damani

et al. 2004

IEEE Trans. Adv. Packag.

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The next-generation convergent microsystems, based on system-on-package (SOP) technology, require up-front system-level design-for-reliability approaches and appropriate reliability assessment methodologies to guarantee the reliability of digital, optical, and radio frequency (RF) functions, as well as their interfaces. Systems approach to reliability requires the development of: i) physics-based reliability models for various failure mechanisms associated with digital, optical, and RF Functions, and their interfaces in the system; ii) design optimization models for the selection of suitable materials and processing conditions for reliability, as well as functionality; and iii) system-level reliability models understanding the component and functional interaction. This paper presents the reliability assessment of digital, optical, and RF functions in SOP-based microsystems. Upfront physics-based design-for-reliability models for various functional failure mechanisms are presented to evaluate various design options and material selection even before the prototypes are made. Advanced modeling methodologies and algorithms to accommodate material length scale effects due to enhanced system integration and miniaturization are presented. System-level mixed-signal reliability is discussed thorough system-level reliability metrics relating component-level failure mechanisms to system-level signal integrity, as well as statistical aspects.

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Bypassing, Decoupling, and Power Distribution

Barnes¹

2004

Robust Electronic Design Reference Book

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Reliability and characterization of MLC decoupling capacitors with C4 interconnections

Cited by 7 publications

References 4 publications

Characterization and performance prediction for integral capacitors in low temperature co-fired ceramic technology

Characterization and performance prediction for integral capacitors in low temperature co-fired ceramic technology

System-Level Reliability Assessment of Mixed-Signal Convergent Microsystems

Bypassing, Decoupling, and Power Distribution

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