Replacement metal-gate NMOSFETs with ALD TaN/EP-Cu, PVD Ta, and PVD TaN electrode

Pan, James N.; Woo, C.; Yang, Chih-Yuh; Bhandary, U.; Guggilla, S.; Krishna, N.; Chung, Hua; Hui, Alvin T.; Yu, Bin; Qi, Xiang; Lin, Ming-Ren

doi:10.1109/led.2003.812574

Cited by 26 publications

(10 citation statements)

References 3 publications

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“…The position of the flatband voltage is slightly lower than that for Ta, indicative of a TaN work function less than 4.0 eV, or an extremely high effective fixed charge density compared to the Ta case. This apparent low work function is in agreement with the TaN work function value reported by Pan et al 10 of 3.8 eV, but differs from other reports of 4.5-4.7 eV. 15,24 If TaN deposition results in higher effective fixed charge (compared to the Ta case), the CV might be expected to shift more with RTA processing, but it actually shifts less.…”

Section: Device Properties With Tan Gate Electrodessupporting

confidence: 87%

“…Tantalum has several properties making it useful as a gate electrode for the study of high-κ gate dielectrics subject to high-temperature device processing conditions; simplicity in processing, being an element rather than an alloy, a high melting point, thermodynamic stability (against oxide formation) in contact with lanthana, 9 a favorable work function for NMOS devices (~4.2 eV), 10 and the fact it can be effectively etched using plasma processing. However, Ta is known to react at high temperature in contact with SiO 2 , 11,12 and thus may not be stable in contact with lanthanum silicate.…”

Section: Introductionmentioning

confidence: 99%

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High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices

Lichtenwalner¹,

Inoue²,

Kingon³

2006

ECS Trans.

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The high-temperature stability of MIS devices based on lanthanum silicate having sub-nm (0.6 -0.7 nm) EOT values are reported. After a 1000°C, 10 s RTA treatment, devices with Ta gate metal undergo an EOT increase to 1.57 nm or higher, while devices having TaN as the gate electrode retain an EOT as low as 1.12 nm. An EOT under 1.0 nm is achieved if the 1000°C RTA is reduced to 5 s, with a corresponding gate leakage of 0.1 A/cm 2 . Medium energy ion scattering and X-ray diffraction analysis reveal that the Ta gate metal undergoes a phase change and reaction above 800°C, while for TaN no change in the XRD spectrum is detected. Interface state defect densities and leakage currents are reduced after the high temperature processing. Results reveal the importance of the entire gate stack design and processing in obtaining good device properties. INTRODUCTIONLanthanum silicate holds potential as a high-K gate dielectric for advanced MOSFET devices due to its properties of good dielectric constant (~16-18) 1 and an expected large band offset with respect to Si, based on that of La 2 O 3 (~2.3 eV). 2 Lanthanum silicate is known to be much less reactive with the ambient environment than lanthana, 3 and has a higher temperature stability of the amorphous phase than lanthana. 1 The reactivity of lanthana with silica to produce a silicate 4,5 provides a means of eliminating interface silica from metal-insulator-semiconductor (MIS) devices, thus offering a pathway towards achieving ~0.5 nm equivalent oxide thickness (EOT) devices under controlled processing conditions. 6 Reports of sub-nm EOT MIS devices fabricated with lanthana or lanthanum silicate typically utilize gate electrodes such as Al or Au, 7,8 which can not withstand high temperatures. Standard MOSFET device processing flows require the gate stack to be stable after an implant-activation rapid thermal anneal (RTA), at temperatures as high as 1000°C. Thus it is important to optimize the entire gate stack in terms of material compatibility and processing.To better understand the issues concerning the thermal stability of lanthanum silicate dielectrics on Si, we have investigated the properties of sub-nm EOT MIS devices having either Ta or TaN gate electrodes, in an attempt to distinguish Si-dielectric reaction effects from dielectric-electrode reactions. Tantalum has several properties making it useful as a gate electrode for the study of high-κ gate dielectrics subject to high-temperature device ECS Transactions, 1 (5) 227-238 (2006) 10.1149/1.2209272, copyright The Electrochemical Society 227 ) unless CC License in place (see abstract). ecsdl.org/site/terms_use address. Redistribution subject to ECS terms of use (see 155.69.4.4 Downloaded on 2015-06-04 to IP 228processing conditions; simplicity in processing, being an element rather than an alloy, a high melting point, thermodynamic stability (against oxide formation) in contact with lanthana, 9 a favorable work function for NMOS devices (~4.2 eV), 10 and the fact it can be effectively etched using plasma processin...

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Section: Device Properties With Tan Gate Electrodessupporting

confidence: 87%

Section: Introductionmentioning

confidence: 99%

High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices

Lichtenwalner¹,

Inoue²,

Kingon³

2006

ECS Trans.

View full text Add to dashboard Cite

show abstract

“…To better understand the issues concerning the thermal stability of lanthanum silicate dielectrics on Si, we have investigated the properties of sub-nm EOT MIS devices having either Ta or TaN gate electrodes, in an attempt to distinguish Si-dielectric reaction effects from dielectric-electrode reactions. Tantalum has several properties making it useful as a gate electrode for the study of high-gate dielectrics subject to high-temperature device processing conditions: simplicity in processing being an element rather than an alloy, a high melting point, thermodynamic stability ͑against oxide formation͒ in contact with lanthana, 9 a favorable work function for n-MOS devices ͑ϳ4.2 eV͒, 10 and the ability to be effectively etched using plasma processing. However, Ta is known to react at high temperature in contact with SiO 2 , 11,12 and thus may not be stable in contact with lanthanum silicate.…”

mentioning

confidence: 99%

High-Temperature Stability of Lanthanum Silicate Gate Dielectric MIS Devices with Ta and TaN Electrodes

Lichtenwalner

Jha

Inoue

et al. 2006

J. Electrochem. Soc.

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The high-temperature stability of lanthanum silicate gate dielectric metal-insulator-semiconductor ͑MIS͒ devices with either Ta or TaN electrodes has been studied. After a 1000°C, 10 s rapid thermal annealing ͑RTA͒ treatment, devices with Ta gate metal undergo an equivalent oxide thickness ͑EOT͒ increase from 0.62 to 1.57 nm or higher, while devices with TaN as the gate electrode experience an EOT increase from 0.62 to only 1.12 nm. An EOT less than 1.0 nm is achieved after a 5 s 1000°C RTA, with a corresponding gate leakage of 0.1 A/cm 2 . Medium-energy ion scattering and X-ray diffraction ͑XRD͒ analysis reveal that the Ta gate metal undergoes a phase change due to reaction with N 2 above 800°C, while for TaN no change in the XRD spectrum is detected. Interface state defect densities and leakage currents are reduced after the high-temperature processing. Results reveal the importance of the entire gate stack design and processing in obtaining good device properties.

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“…To fabricate the Si/Ge heterostructure, the Ge layer should be grown by epitaxial processes [ 23 ]. Since Ge is confined in the channel region for Case4 structure, this layer can be easily fabricated using self-aligned epitaxial process during the replacement-metal-gate (RMG) process [ 36 ]. Ge condensation technique can be applied to implement the high Ge content SiGe channel close to pure Ge [ 37 ].…”

Section: Resultsmentioning

confidence: 99%

High On-Current Ge-Channel Heterojunction Tunnel Field-Effect Transistor Using Direct Band-to-Band Tunneling

et al. 2019

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The main challenge for tunnel field-effect transistors (TFETs) is achieving high on-current (Ion) and low subthreshold swing (SS) with reasonable ambipolar characteristics. In order to address these challenges, Ge-channel heterostructure TFET with Si source and drain region is proposed, and its electrical characteristics are compared to other TFET structures. From two-dimensional (2-D) device simulation results, it is confirmed that the Si/Ge heterostructure source junction improves Ion and SS characteristics by using the direct band-to-band tunneling current. Furthermore, the proposed structure shows suppressed ambipolar behavior since the Ge/Si heterostructure is used at the drain junction.

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Replacement metal-gate NMOSFETs with ALD TaN/EP-Cu, PVD Ta, and PVD TaN electrode

Cited by 26 publications

References 3 publications

High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices

High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices

High-Temperature Stability of Lanthanum Silicate Gate Dielectric MIS Devices with Ta and TaN Electrodes

High On-Current Ge-Channel Heterojunction Tunnel Field-Effect Transistor Using Direct Band-to-Band Tunneling

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