RF package characterization and modeling

Khandelwal, P.; Chinnaswamy, K.; Shenai, K.

doi:10.1109/ugim.1999.782849

Cited by 5 publications

(2 citation statements)

References 4 publications

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“…The entire time taken for the self-calibration depends on the number of taps in Lg; we show in this work that each tap requires about 3 us processing time. This compares very favorably to times taken by current commercial test schemes [8], wherein the testing period itself is in the order of hundreds of milliseconds.…”

Section: Merits Of This Architecturementioning

confidence: 70%

“…The rapid increase in circuit operating speeds, I/O pin count and functionality, coupled with the complex behavior of deep sub-micron devices, have placed unique challenges on the encompassing package. Furthermore, at radio frequencies, package parasitics are no longer negligible [8]: 3 (a) Interconnection of chip and package through bond-wires, (b) parasitics associated with the chip-package interface.…”

Section: Chip-package Co-designmentioning

confidence: 99%

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Dynamic input match correction in RF low noise amplifiers

Das

Gopalan

Washburn

et al.

19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings.

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An R.F. circuit that recognizes its faults, and then corrects its performance in real time has been the holy-grail of RFIC design. This work presents, for the first time, a complete architecture and successful implementation of such a circuit. It is the first step towards the grand vision of fault-free, package independent, integrated R.F. Front End circuitry. The performance of R.F. front-end circuitry can degrade significantly due to process faults and parasitic package inductances at its input. These inductances have wide tolerances and are difficult to co-design for. A novel methodology, which overcomes current obstacles plaguing such an objective, is proposed wherein the affected performance metric of the circuit is quantified, and the appropriate design parameter is modified in real-time, thus enabling self-correction. This proof of concept is demonstrated by designing a cascode LNA and the complete self-correction circuit in IBM 0.25 urn CMOS RF process. The self-correction circuitry ascertains the input match frequency of the circuit by measuring its performance and determines the frequency interval by which it needs to be shifted to restore it to the desired value. It then feeds back a digital word to the LNA which adaptively corrects its input-match. It offers the additional flexibility of using different packages for the front-end since it renders the circuitry independent of package parasitics, by re-calibrating the input match on-the-fly. The circuitry presented in this work offers the advantages of low power, robustness, absence of DSP cores or processors, reduction in design cycle times, guaranteed optimal performance under varying conditions and fast correction times (less than 30 us).

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Section: Merits Of This Architecturementioning

confidence: 70%

Section: Chip-package Co-designmentioning

confidence: 99%

Dynamic input match correction in RF low noise amplifiers

Das

Gopalan

Washburn

et al.

19th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2004. DFT 2004. Proceedings.

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Multi-port de-embedding methodology based on exponential mapping

Ballicchia¹,

Turchetti²,

Orcioni³

2014

2014 44th European Microwave Conference

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Multi-port de-embedding methodology based on exponential mapping

Ballicchia

Turchetti

Orcioni

2014

2014 9th European Microwave Integrated Circuit Conference

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This paper proposes a methodology that, starting from a set of calibration measurements picked up at the external ports, allows the de-embbeding of a multi-port transition and the determination of its representative matrix. With this methodology the coupling between internal versus external ports are supposed symmetrical. This hypothesis together with the use of exponential mapping and Baker-Campbell-Hausdorff allows the use of only three standards for the characterization of the multi-port transition. The proposed methodology is applied to the identification of the QFN16 package

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RF package characterization and modeling

Cited by 5 publications

References 4 publications

Dynamic input match correction in RF low noise amplifiers

Dynamic input match correction in RF low noise amplifiers

Multi-port de-embedding methodology based on exponential mapping

Multi-port de-embedding methodology based on exponential mapping

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