The input match of RF front-end circuitry can degrade significantly due to process faults and parasitic package inductances at its input pad. The proposed technique ascertains the input match frequency of the circuit by using a built-in self-test (BiST) structure, determines the frequency interval by which it needs to be shifted to restore it to the desired value, and then feeds back a digital word to the low-noise amplifier (LNA), which adaptively corrects its input-match in real-time. The circuitry presented in the paper offers the advantages of low power overheads (the circuits can be powered off when not in use), robustness, no requirements of digital signal processing cores or processors, and fast calibration times (less than 30 s). This proof of concept is demonstrated by designing a cascode LNA and the complete self-calibration circuit in IBM 0.25-m CMOS RF process.Index Terms-Built-in self-test (BiST) for RF circuits, design for fault tolerance, reliability of RF circuits, RF circuit design.

No abstract

This paper presents an on-chip BiST technique for a common class of RF communication circuits, which has no measurable impact on the performance of the circuit-undertest. The technique is extremely robust and does not require the use of any DSP cores or off-line processing. The resultant architecture has very low overheads (<4% area overhead), ultra fast test times (30µs) and can simply be "plugged" into the RF circuit without the need for any co-design. We present the methodology along with associated circuitry and demonstrate its utility in the self-test of a standard cascode LNA.

Increasing process variations and tolerance limits such testing approaches quantify performance, fault-tolerant with successive scaling, along with rising costs per design cycle design will directly enhance reliability, by ensuring optimal have made the fault-tolerance paradigm pertinent in RFICs. circuit operation under varying conditions. Due to the high frequencies involved, traditional fault-tolerance Key criteria to such design are minimal intrusion, low methods used in digital and lower frequency analog circuits overheads and ultra-fast calibration. In prior work, we have cannot be applied. This paper presents a non-intrusive and p robust technique of self-calibrating the gain and output match proposed to use the HF supply current drawn by the RF of LNAs. It involves very low overheads and does not degrade , circuit performance in any measurable way, in addition to input-match of a LNA [5]. The gain of the LNA is a critical ultra-fast calibration times (lower than 50 ps). We present parameter to the front-end performance, since it impacts the simulation results of the system designed in the IBM 0.25 pm SNR. A drop in gain due to process variations or faults can process.lead to reduced receiver sensitivity, thus leading to loss of

Abstract