Ring Amplifiers for Switched Capacitor Circuits

Hershberg, Benjamin; Weaver, Skyler; Sobue, Kazuki; Takeuchi, Shigeyuki; Hamashita, Koichi; Moon, Un-Ku

doi:10.1109/jssc.2012.2217865

Cited by 171 publications

(91 citation statements)

References 16 publications

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“…Due to the nonlinearity of the circuit, continuous background calibration is necessary. Another alternative amplifier topology is a ring amplifier (RA) [16][17][18]. The speed of the RA-based switched-capacitor circuit is determined by the oscillating frequency, and the maximum sampling rate demonstrated thus far is 100MS/s at a modest 9-bit ENOB [18].…”

Section: Introductionmentioning

confidence: 99%

A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers

Boo

Boning

Lee

2015

IEEE J. Solid-State Circuits

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The virtual ground reference buffer (VGRB) technique is introduced as a means to improve the performance of switched-capacitor circuits. The technique enhances the performance by improving the feedback factor of the op-amp without affecting the signal gain. The bootstrapping action of the level-shifting buffers relaxes key op-amp performance requirements including unitygain bandwidth, noise, open-loop gain and offset compared with conventional circuits. This reduces the design complexity and the power consumption of op-amp based circuits. Based on this technique, a 12b pipelined ADC is implemented in 65nm CMOS that achieves 67.0dB SNDR at 250MS/s and consumes 49.7mW of power from a 1.2V power supply.

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Section: Introductionmentioning

confidence: 99%

A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers

Boo

Boning

Lee

2015

IEEE J. Solid-State Circuits

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“…As discussed in [4], when the ring amplifier performs amplification, it starts from the initial ramping phase, then oscillates but gradually stabilizes until entering the stabilization phase. In the initial ramping phase, the output transistor M pout /M nout (in Fig.…”

Section: Selection Of R Smentioning

confidence: 99%

“…In [3], a two-stage inverter-based amplifier has been proposed but the need of compensation and a class-A output stage without rail to rail swing limit its power efficiency. The ring amplifier proposed in [4], which is composed of 3 stage inverters as depicted in Fig. 1 (a), combines the advantages of the comparator-based and inverter-based circuits with slew-based charging, rail-to-rail output swing and without needing compensation, thus guaranteeing its good power efficiency.…”

Section: Introductionmentioning

confidence: 99%

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A Calibration Scheme for Stability of Self-biased Ring Amplifier

2017

2017 6th International Conference on Advanced Materials and Computer Science (ICAMCS 2017)

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Abstract. This paper presents a calibration scheme to enhance the robustness of the SelfBiased Ring Amplifier (SBRA) under PVT variations. As the ring amplifier is developed based on a ring oscillator structure, it can easily oscillate under PVT variations. The proposed calibration method utilizes an Oscillation Detection Circuit (ODC) with a close loop control of a Programmable Resistor Array Circuit (PRAC) to adjust the dead-zone (stability region), thus stabilizing the SBRA. The introduced ODC and PRAC have little influence on the power efficiency as well as hardware overhead. Based on a 1.5 bit/stage Multiplying Digital to Analog Converter (MDAC) circuit setup, the simulation shows that the proposed method can stabilize the ring amplifier in the range of 0°C to 85°C at all corners.

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“…Some inverter-related techniques [1,3,4] have been used in the amplifier to improve the efficiency. However, the technique in [1] uses passive devices; [3] would get low bandwidth using the technique; and the technique in [4] uses extra switch and bias voltage. So, in this work, an inverter-based class AB amplifier is proposed to design the 11-bit pipelined ADC based on 28 nm CMOS technology.…”

Section: Introductionmentioning

confidence: 99%

11b 60 MHz pipelined ADC with inverter-based class AB amplifier in 28 nm CMOS technology

Wei

Xiao

Huang

2017

IEICE Electron. Express

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An inverter-based class AB amplifier is proposed to design the 11b pipelined analogue-to-digital converter (ADC) in 28 nm CMOS technology. The structure of the proposed amplifier is more concise compared with conventional amplifiers. The amplifier occupies small area, and its quiescent dissipation is only 1.4 mA. This structure is suitable for design in scaled process. The operation of the amplifier is carefully elaborated. The simulation results show: the ADC can achieve 75.3 dB SFDR and 66.8 dB SNDR, while it occupies an area of 0.4 mm 2 and consumes a power of 17 mW with 1.05 V supply. These results yield a FOMS of 159.3 dB.

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Ring Amplifiers for Switched Capacitor Circuits

Cited by 171 publications

References 16 publications

A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers

A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers

A Calibration Scheme for Stability of Self-biased Ring Amplifier

11b 60 MHz pipelined ADC with inverter-based class AB amplifier in 28 nm CMOS technology

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