S/sup 3/I: The seamless S/sup 2/I switched-current cell

Hughes, J.B.; Moulding, K.W.

doi:10.1109/iscas.1997.608627

Cited by 9 publications

(11 citation statements)

References 4 publications

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“…The second part of the 0.18 m process readout circuitry is the delta-reset sampling (DRS) offset suppression circuitry, which is a modified version of the current memory cell described in [15]. A single offset suppression circuit is used for the entire image array, alleviating column FPN.…”

Section: B Current Conveyor Readoutmentioning

confidence: 99%

Linear Current-Mode Active Pixel Sensor

Philipp

Orr

Gruev

et al. 2007

IEEE J. Solid-State Circuits

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A current mode CMOS active pixel sensor (APS) providing linear light-to-current conversion with inherently low fixed pattern noise (FPN) is presented. The pixel features adjustable-gain current output using a pMOS readout transistor in the linear region of operation. This paper discusses the pixel's design and operation, and presents an analysis of the pixel's temporal noise and FPN. Results for zero and first-order pixel mismatch are presented. The pixel was implemented in a both a 3.3 V 0.35 µm and a 1.8 V 0.18 µm CMOS process. The 0.35 µm process pixel had an uncorrected FPN of 1.4%/0.7% with/without column readout mismatch. The 0.18 µm process pixel had 0.4% FPN after delta-reset sampling (DRS). The pixel size in both processes was 10 X 10 µm 2 , with fill factors of 26% and 66%, respectively. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Pennsylvania's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. Keywords CMOS analog integrated circuits, image sensors Disciplines Electrical and Computer EngineeringThis journal article is available at ScholarlyCommons: http://repository.upenn.edu/ese_papers/312

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Section: B Current Conveyor Readoutmentioning

confidence: 99%

Linear Current-Mode Active Pixel Sensor

Philipp

Orr

Gruev

et al. 2007

IEEE J. Solid-State Circuits

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“…The noise suppression circuitry is based on a current memory cell described in [14]. The memory cell is composed of a coarse and a fine sub-memory cell.…”

Section: Imaging Sensor and Micro-polarizer Array Architectural mentioning

confidence: 99%

Image Sensor With Focal Plane Extraction of Polarimetric Information

Gruev

Spiegel

Engheta

2006 IEEE International Symposium on Circuits and Systems

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A novel focal plane imaging sensor capable of real time extraction of polarization information is presented. The imaging system consists of a photo array of 256 by 256 linear current mode active pixel sensors (APS). Analog processing circuitry is included at the focal plane for noise suppression and computation of the Stokes parameters. The imaging sensor was fabricated in 0.18μm process with 10μm pixel pitch and 75% fill factor. An array of micro polarizer is designed and fabricated separately and will be mounted on top of the imaging array. Simulation results of the imaging sensor are presented. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Pennsylvania's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it.This conference paper is available at ScholarlyCommons: http://repository.upenn.edu/ese_papers/245 Image Sensor With Focal Plane Extraction of Polarimetric InformationViktor Gruev, Jan Van der Spiegel and Nader EnghetaElectrical and Systems Engineering Department University of Pennsylvania Philadelphia, Pennsylvania {vgruev, jan}@seas.upenn.edu, engheta@ee.upenn.edu Abstract-A novel focal plane imaging sensor capable of real time extraction of polarization information is presented. The imaging system consists of a photo array of 256 by 256 linear current mode active pixel sensors (APS). Analog processing circuitry is included at the focal plane for noise suppression and computation of the Stokes parameters. The imaging sensor was fabricated in 0.18µm process with 10µm pixel pitch and 75% fill factor. An array of micro polarizer is designed and fabricated separately and will be mounted on top of the imaging array. Simulation results of the imaging sensor are presented.

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“…Therefore, the photo pixel read out transistor is operated in linear mode, leading to linear correlation between light intensity and output current and easy incorporation of CDS circuitry at the read out. The CDS circuitry is based on the I 2 C current memory cell described by Hughes et al [7]. The memory cell is composed of a coarse sub-memory and a fine sub-memory cell (Fig.…”

Section: Imagermentioning

confidence: 99%

“…The memory cell is composed of two parts. The first part is the standard I 2 C current memory cell, composed of coarse and fine submemory units [7]. Although the chip area occupied by the I 2 C memory cell is increased compared to a standard single transistor memory cell, the precision of the memory cell is improved to 8 bits.…”

Section: Imagermentioning

confidence: 99%

Image Sensor with General Spatial Processing in a 3D Integrated Circuit Technology

Gruev¹,

Spiegel²,

Philipp³

et al.

2006 IEEE International Symposium on Circuits and Systems

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An architectural overview of an image sensor with general spatial processing capabilities on the focal plane is presented. The system has been fabricated on two separate tiers, implemented on silicon-on-insulator technology with vertical interconnect capabilities. One tier is dedicated to imaging, where photosensitivity and pixel fill have been optimized. The subsequent layers contain noise suppression and digitally controlled analog processing elements, where general spatial filtering is computed. The digitally controlled aspect of the processing unit allows generic receptive fields to be computed on read out. The image is convolved with four receptive fields in parallel. The chip provides parallel readout of the filtered results and the intensity image. This material is posted here with permission of the IEEE. Such permission of the IEEE does not in any way imply IEEE endorsement of any of the University of Pennsylvania's products or services. Internal or personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution must be obtained from the IEEE by writing to pubs-permissions@ieee.org. By choosing to view this document, you agree to all provisions of the copyright laws protecting it. Abstract-An architectural overview of an image sensor with general spatial processing capabilities on the focal plane is presented. The system has been fabricated on two separate tiers, implemented on silicon-on-insulator technology with vertical interconnect capabilities. One tier is dedicated to imaging, where photosensitivity and pixel fill have been optimized. The subsequent layers contain noise suppression and digitally controlled analog processing elements, where general spatial filtering is computed. The digitally controlled aspect of the processing unit allows generic receptive fields to be computed on read out. The image is convolved with four receptive fields in parallel. The chip provides parallel readout of the filtered results and the intensity image.

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S/sup 3/I: The seamless S/sup 2/I switched-current cell

Cited by 9 publications

References 4 publications

Linear Current-Mode Active Pixel Sensor

Linear Current-Mode Active Pixel Sensor

Image Sensor With Focal Plane Extraction of Polarimetric Information

Image Sensor with General Spatial Processing in a 3D Integrated Circuit Technology

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