Selection of MOSFET Sizes by Fuzzy Sets Intersection in the Feasible Solutions Space

Abstract

A fuzzy sets intersection procedure to select the optimum sizes of analog circuits composed of metal-oxidesemiconductor field-effect-transistors (MOSFETs), is presented. The cases of study are voltage followers (VFs) and a current-feedback operational amplifier (CFOA), where the width (W) and length (L) of the MOSFETs are selected from the space of feasible solutions computed by swarm or evolutionary algorithms. The evaluation of three objectives, namely: gain, bandwidth and power consumption; is performed using HSPICETM with standard integrated circuit (IC) technology of 0.35μm for the VFs and 180nm for the CFOA. Therefore, the intersection procedure among three fuzzy sets representing “gain close to unity”, ”high bandwidth” and “minimum power consumption”, is presented. The main advantage relies on its usefulness to select feasible W/L sizes automatically but by considering deviation percentages from the desired target specifications. Basically, assigning a threshold to each fuzzy set does it. As a result, the proposed approach selects the best feasible sizes solutions to guarantee and to enhance the performances of the ICs in analog signal processing applications.

Fuzzy Analytic Hierarchy Process for Risk Assessment to General-assembling of Satellite

“…At present, there have been plenty of research that blend fuzzy logic, which is a popular method of incorporating uncertain parameters into the decision-making process, with analytic hierarchy process to form a model for risk assessment. Those risk assessment models are widely applied to multiple fields such as floor water invasion in coal mines [7], oil and gas offshore wells [8], electronic engineering [9,10], information technology projects [11], green initiatives in the fashion industry [12], food supply chains [13],…”

Sizing Analog Integrated Circuits by Current-Branches-Bias Assignments with Heuristics

“…Is for that reason that we apply heuristics herein for optimizing its performances, but the main goal is focused on showing that by applying our proposed CBBA approach, the execution of the three evolutionary algorithms (EAs): NSGA-II [13], MOEA/D [14] and MOPSO [15], is being improved and accelerated. The implementation details of those three EAs when applied to the optimal sizing of analog ICs can be found in [1], [2], [4], [6]. The inclusion of our proposed CBBA approach is straightforward but quite useful.…”

“…The usefulness of our proposed CBBA approach is demonstrated by sizing the recycled folded cascode (RFC) operational transconductance amplifier (OTA) given in [9], by applying three EAs, namely: non-dominated sorting genetic algorithm (NSGA-II) [13], multi-objective EA with decomposition (MOEA/D) [14], and multi-objective particle swarm optimization (MOPSO) [15]. These EAs have been applied to sizing analog ICs in [1], [2], [4], [6]. In those references one can find their implementation details, and one can infer that at this moment any EA considers CBBA before starting the sizing optimization process.…”