Silicon carbide (SiC) has become the substrate of choice for III-N epilayers applied to electronic devices due to the lack of a native III-N substrate. This is particularly true for high power applications, since the thermal conductivity of the substrate enhances device performance. Although the GaN lattice match is slightly better for SiC than for sapphire, the dislocation densities that result are still very high (generally in the high 108 cm-2 range) and often deleterious to device performance. Screw-component dislocations are especially critical since they serve as leakage paths in vertically conducting III-N devices. In this paper efforts to reduce the extended defect density in III-N films grown on SiC will be reviewed. Details on recent efforts to use step-free SiC mesa surfaces arrayed on commercial 4HSiC substrates will then be highlighted showing dramatic reductions in extended defect densities and the virtual elimination of critical defects for vertically conducting devices. In these experiments, SiC surfaces that are homoepitaxially grown step-free or of very low step density have been used as growth templates for thin (<3 μm) GaN films deposited on a novel 1000 Å AlN nucleation layer characterized by a total dislocation density two orders of magnitude lower than the previous state-of-the-art, and with no evidence of screw-component dislocations.