2016
DOI: 10.1002/admt.201600238
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Shrinkage Control of Photoresist for Large‐Area Fabrication of Sub‐30 nm Periodic Nanocolumns

Abstract: A method to fabricate large‐area arrays of nanocolumns without a deep‐UV laser source is reported. This method allows high‐yield fabrication of 3 × 3 cm2 arrays of sub‐30 nm nanocolumns made of bottom antireflection layer coating (BARC) by combining displacement Talbot lithography (DTL) using a monochromatic UV beam (365 nm wavelength) with plasma etching techniques. DTL is used to manufacture an initial pattern of periodic photoresist nanocolumns with a diameter of ≈110 nm. N2 plasma can transfer this pattern… Show more

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Cited by 24 publications
(29 citation statements)
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“…1d). These plasma etching processes were conducted using a wafer-scale parallel plate reactive ion etching system (in-house built TEtske system, NanoLab Cleanroom) at 13 mTorr, and 25 W. 17 Patterning periodic Cr nanolines using lift-off process A thin Cr layer of approximately 6 nm was deposited over the surface of the patterned wafer using a sputtering system (in- house built T'COathy system, NanoLab Cleanroom) (Fig. 1e).…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…1d). These plasma etching processes were conducted using a wafer-scale parallel plate reactive ion etching system (in-house built TEtske system, NanoLab Cleanroom) at 13 mTorr, and 25 W. 17 Patterning periodic Cr nanolines using lift-off process A thin Cr layer of approximately 6 nm was deposited over the surface of the patterned wafer using a sputtering system (in- house built T'COathy system, NanoLab Cleanroom) (Fig. 1e).…”
Section: Methodsmentioning
confidence: 99%
“…To overcome this limitation, we developed a robust technique for shrink-etching the patterned PR nanostructures using a mixture of O 2 /N 2 plasma. 17 As a result, bottom antireflection coating (BARC) nanostructures with dimensions down to sub-30 nm could be reliably fabricated from the initially patterned PR nanostructures.…”
Section: Introductionmentioning
confidence: 99%
“…1d ). After baking the Si-wafer in an oven at 80 °C for at least 3 h, a plasma etching process of the PDMS membrane was conducted in a parallel plate reactive ion etching system (in-house built TEtske system) 30 at 47 sccm SF 6 , 17 sccm O 2 , 50 mTorr, and 100 W to decrease the thickness of the PDMS membrane and open the through-holes ( Fig. 1e ).…”
Section: Methodsmentioning
confidence: 99%
“…As introduced above, the DTL permits good pattern uniformity on a nonflat surface. 17 However, the topography of the microsieve array may still cause thickness nonuniformity in the coatings which leads to a poor pattern transfer result. Therefore, we introduced a planarizing layer by precoating a positive resist prior to the DTL experiment to overcome the nonuniformity problem.…”
Section: B Nanoscaffoldmentioning
confidence: 99%