SiGe-on-insulator symmetric lateral bipolar transistors

Yau, Jeng-Bang; Cai, Jin; Yoon, Joonah; D’Emic, C.; Chan, K.; Ning, T.H.; Engelmann, Sebastian; Park, D.-G.; Mo, R.

doi:10.1109/s3s.2015.7333533

Cited by 10 publications

(9 citation statements)

References 3 publications

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“…Also plotted in Fig. 3 is the data of a SiGe-OI device from [5], which shows the same Ie as the Si-01 device but at about 130 m V lower VBE• These results confirm the scaling of operation voltage VBE with semiconductor bandgap in the base.…”

Section: Collector Current and Base-region Energy Bandgapsupporting

confidence: 57%

“…The Ge-Ol transistors were fabricated using a CMOS-like process similar to those used to fabricate Si-OI and SiGe-OI lateral transistors [4,5]. The process flow is as illustrated in Fig.…”

Section: Device F Abrlca Tlonmentioning

confidence: 99%

“…This, together with the merits of SOl lateral bipolar transistors mentioned above suggests that symmetric 978-1-5090-0484-3/16/$31.00 ©2016 IEEE 130 lateral Ge-on-insulator (Ge-Ol) bipolar transistors could be an excltmg, scalable, high-performance, and low-power technology. In this paper, we report the first demonstration of Ge-Ol symmetric lateral NPN transistors, built using a fabrication process sequence similar to those used previously and successfully to fabricate Si-OI and SiGe-OI transistors [4,5]. The measured Ge-Ol device currents are compared with those from the Si-OI and SiGe-OI devices, and examined to shed light on process-related device physics.…”

Section: Introductionmentioning

confidence: 99%

“…If a Si bipolar circuit operates with a power supply voltage of 1.0 V, the same circuit built with SiGe or Ge bipolar transistors can readily operate with a power supply significantly less than 1.0 V. Recently, a SiGe-on-insulator (SiGe-OI) (-25% Ge) lateral bipolar transistor was demonstrated to achieve the same collector current as a Si-Ol device but at -130 mV lower VSE [5], confirming that indeed the path towards reducing the power supply voltage for bipolar circuits is to build the transistors using small-bandgap semiconductors.…”

Section: Introductionmentioning

confidence: 99%

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Ge-on-insulator lateral bipolar transistors

Yau

Yoon

Cai

et al. 2016

2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)

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We report the first demonstration of thin-base symmetric lateral NPN bipolar transistors built on 8-inch Ge-on insulator (Ge-OI) wafers. A Ge-OI device can achieve the same collector current as a Si-OI device but at -460 mV lower V/JE due to the bandgap of Ge being 460 meV smaller than that of Si.Lower operation voltage should translate directly into lower power dissipation. CMOS-like process was used to fabricate lateral Ge-OI bipolar transistors. The measured collector and base currents are examined and compared with those of Si-OI and SiGe-OI devices to shed light on process-related device physics. The large observed base current at small V/JE is attributed to recombination at the Ge/BOX interface in the emitter-base diode space-charge region.

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Section: Collector Current and Base-region Energy Bandgapsupporting

confidence: 57%

“…The Ge-Ol transistors were fabricated using a CMOS-like process similar to those used to fabricate Si-OI and SiGe-OI lateral transistors [4,5]. The process flow is as illustrated in Fig.…”

Section: Device F Abrlca Tlonmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Ge-on-insulator lateral bipolar transistors

Yau

Yoon

Cai

et al. 2016

2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM)

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“…Many advantages for symmetric lateral bipolar transistors on SOI, which include CMOS compatible process flow, improved performance such as higher gains and higher cutoff frequencies, have made this device a good choice for extremely low power mixed signal/analog applications. − …”

Section: Introductionmentioning

confidence: 99%

Comparative Study of Different Configurations in Triple-Sided Charged Plasma Symmetric Lateral Heterojunction Bipolar Transistors on SOI

Devi

Srivastava

2019

ACS Appl. Electron. Mater.

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A comparative simulation study of triple-sided charged plasma symmetric lateral heterojunction bipolar transistors (3SCP SLHBTs) on SOI is performed for the first time. A 3SCP SLHBT has all the advantages that a conventional charge plasma (cCP) lateral bipolar on SOI has, namely, overcoming the issue related to the thermal budget along with improvements in current gain and speed. Our new design along with the heterojunction configuration is able to further improve upon the performance of cCP design by inducing carriers from the bottom, side, and top with respect to cCP design where the carrier concentration is low toward the bottom region of the active device layer. Our novel 3SCP SLHBT design shows huge improvements in current gain, f T , and f max by almost 1092, 80.6, and 51.6% respectively with repsect to cCP SLHBT design. In this article, we carried out a systematic study of the heterojunction bipolar structure of the 3SCP device design with three different HBT configurations and presented a comparative study of their performance. The different 3SCP SLHBT configurations studied here as emitter-base-collector are Si-0.3Ge-Si, Si-linearly graded SiGe-Si, and Si-Ge-Si, respectively. We are able to achieve the same collector current but with a lower V BE by ∼320 mV when a device having a Si-linearly graded SiGe-Si configuration is replaced with a device having a Si-Ge-Si configuration. We are able to achieve and demonstrate this novel HBT device with the best optimal performance parameters for the Si-0.3Ge-Si configuration. This device shows a current gain of 8.4 × 10 5 , with f T = 428.87 GHz and f max = 2.38 THz. We are also able to successively demonstrate the symmetric complementary 3SCP SLHBT inverter using the Si-0.3Ge-Si configuration having optimal digital circuit performance parameters. The inverter has a switching voltage (V M ) of 0.505 V, a low noise margin (NM L ) of 0.47 V, and a high noise margin (NM H ) of 0.45 V at 1 V.

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Triple-sided charged plasma symmetric lateral bipolar transistor on SiGe-OI

Devi¹,

Singh²,

Kumar³

et al. 2019

Semicond. Sci. Technol.

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A novel triple sided charged plasma (3SCP) device structure of a symmetric lateral bipolar transistor (SLBT) on silicon-germanium on insulator (SiGe-OI) is proposed. Charged plasma lateral bipolar transistor on SOI have many advantages especially in overcoming the thermal budget in addition to high gain and high speed for analog signal applications. In this paper we have carried out a systematic study of this novel 3SCP SLBT with uniform 0.3 Ge content in silicon and with linearly graded SiGe as the active device layer. With 3SCP SLBT having linearly graded SiGe as active device layer we were able to achieve a current gain>10 4 , f T >200 GHz and f max >1130 GHz. We were able to demonstrate improvement in terms of current gain, f T and f max by around 4.52, 2.55 and 2.07 times respectively with our novel design as compared to the conventional charged plasma symmetric lateral bipolar transistor (CP SLBT) having uniform 0.3Ge content in Silicon as active device layer. A complementary 3SCP symmetric lateral bipolar inverter with linearly graded SiGe as active device layer is also discussed for digital applications. The inverter shows switching voltage (V M )=0.4616 V, low noise margin (N ML )=0.4302 V and high noise margin (NM H )=0.4725 V when operated at 1.0 V.

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SiGe-on-insulator symmetric lateral bipolar transistors

Cited by 10 publications

References 3 publications

Ge-on-insulator lateral bipolar transistors

Ge-on-insulator lateral bipolar transistors

Comparative Study of Different Configurations in Triple-Sided Charged Plasma Symmetric Lateral Heterojunction Bipolar Transistors on SOI

Triple-sided charged plasma symmetric lateral bipolar transistor on SiGe-OI

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