Simple Cleaning and Conditioning of Silicon Surfaces with UV/Ozone Sources

Tunnel oxide passivated carrier-selective contacts based on ultra-thin SiO 2 layers

“…The tunnel oxide layer having an approximate thickness of 1.3-1.5 nm was either wet chemically grown in 68 wt% nitric acid at 110°C for 10 min [10,11] or in ozonized DI-water with a constant ozone concentration of 30 ppm at 30°C and varying exposure time (t ¼3, 5, 10 and 15 min). Alternatively the oxide layer was generated by photo-oxidation with an UV excimer source [3,12]. The UV excimer source emits monochromatic UV light at a wavelength of 172 nm which dissociates molecular oxygen (O 2 ) of the ambient atmosphere.…”

“…Beside the potentially lower process costs for the ozone based oxide, it was already shown that UV/O 3 grown oxides allow for higher thermal annealing temperatures which can be attributed to a favorable interface stoichiometry of the grown oxide [3]. As described in literature [4][5][6][7] ozone-grown oxides are found to exhibit improved interface (less strain, transition layer is reduced, high density and less defects due to more saturated Si-O bonds) and electrical properties due to the occurring damage-free oxidation of the silicon surface.…”

“…In addition, it is assumed that atomic oxygen is the main driving force of the oxidation because it is the species that has the feature to be particularly diffusion active in the SiO x layer and saturate silicon dangling bonds [8]. The resulting oxide layers are supposed to have a higher density (2.11 g/cm 3 O 3 based oxides [7]), have a lower amount of defects [7] and their structure is closer to that of stoichiometric SiO 2 [3].…”

“…Since the quality of the tunnel oxide is crucial for the surface passivation the main purpose of this publication is to draw a comparison between the standard wet-chemical HNO 3 oxide, a dry-grown UV/O 3 oxide [3], and a wet-chemical oxide grown in ozonized DI-H 2 O (DIO 3 ). The different oxidation technologies are compared using microstructural analysis but also at device level.…”

Electrografted P4VP for High Aspect Ratio Copper TSV Insulation in Via-Last Process Flow

“…The third step uses an UV/Ozone cleaning to remove organics contaminants 21 and to create a thin silicon oxide layer at the surface. 22 Directly after the third step, the samples were dipped in water at room temperature for an extended period of time. The last step uses Piranha solution, to remove any remaining organic and metal contaminants.…”