Strain and Compositional Analysis of (Si)Ge Fin Structures Using High Resolution X‐Ray Diffraction

Abstract

The performance of heterogeneous 3D transistor structures critically depends on the composition and strain state of the buffer, channel, and source/drain regions. In this paper we discuss the value of in‐line high resolution X‐ray diffraction (HRXRD) measurements based on three representative examples. First, we analyzed the strain state of etched Ge fins in the two in‐plane directions. We could verify a loss in channel strain after growth of a Si cap which we attribute to Ge reflow. Secondly, we studied the composition and strain state of relaxed SiGe fins selectively grown in an STI matrix where we found an anisotropic in‐plane strain state with significantly reduced relaxation in the direction along the fin. Finally, we used HRXRD for the analysis of complex multilayer fin structures which are relevant for horizontal nanowire FETs that are candidates to replace FinFETs below the 7 nm technology node. With this example we could demonstrate that HRXRD is capable of providing insight into fin stress created by interlayer dielectrics (ILD0).

Editors' Choice—Epitaxial CVD Growth of Ultra-Thin Si Passivation Layers on Strained Ge Fin Structures

“…Compressive uniaxial strain is preferred for pFET mobility and has been confirmed for the replacement channel fabrication scheme (STI first) 6,7,31 as well as the STI last fabrication scheme. 19,32 The out-of-plane lattice constant (in vertical direction) shows a larger lattice constant with respect to relaxed Ge, as verified by symmetric (004) ω -2 XRD scans. 32 After growing a 3-10 ML thick Si passivation layer on top of the strained Ge fin surfaces, the Ge peak shows a shift to smaller ω -2 (Fig.…”

“…19,32 The out-of-plane lattice constant (in vertical direction) shows a larger lattice constant with respect to relaxed Ge, as verified by symmetric (004) ω -2 XRD scans. 32 After growing a 3-10 ML thick Si passivation layer on top of the strained Ge fin surfaces, the Ge peak shows a shift to smaller ω -2 (Fig. 6a).…”

Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration

“…However, the situation might be different for fin patterned wafers as the thermal steps are typically applied after fin patterning during which elastic relaxation is expected to occur. 13 We have also observed that peculiar relaxation mechanisms occur at wafers edges. In the case of Si 0.7 Ge 0.3 grown on 300 mm Si(001) wafers, more than 200 nm thick SiGe layers could be grown relaxation-free at the center of the wafer.…”

“…For Si 1-x Ge x fins grown on Si(001) or Si 1-y Ge y (001) Strain-Relaxed Buffers (SRB), Si 1-x Ge x relaxation should be avoided to keep defectivity under control and preserve the longitudinal strain along the channel. 13 In reference 13, the authors have studied the relaxation behavior of 20 nm wide and 30 nm high Ge fins patterned from Ge blanket layers grown on a Si 0.32 Ge 0.68 SRB. The pitch (distance between two fins) was 45 nm.…”

“…As a conclusion, thick SiGe epi layers needed for the fabrication of tall fins should be grown with a controlled and limited thermal budget to ensure the formation of metastable strained layers and avoid relaxation during epi. After fin etch, free sidewalls allow for some elastic deformation 13 which helps avoid plastic relaxation, making 50 nm Si 0.7 Ge 0.3 a viable option for device processing.…”